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build problems? #106

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HadXu opened this issue May 27, 2022 · 17 comments
Closed

build problems? #106

HadXu opened this issue May 27, 2022 · 17 comments
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@HadXu
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HadXu commented May 27, 2022

-- Found v++:/data/soft/Xilinx/Vitis/2021.2/bin/v++
-- Found xchessmk:/data/soft/Xilinx/Vitis/2021.2/aietools/bin/xchessmk
-- Found libme.a:/data/soft/Xilinx/Vitis/2021.2/aietools/data/cervino/lib/Release/libme.a
-- Found AIE libc.a:/data/soft/Xilinx/Vitis/2021.2/aietools/data/cervino/lib/runtime/lib/Release/libc.a
-- Found AIE libm.a:/data/soft/Xilinx/Vitis/2021.2/aietools/data/cervino/lib/runtime/lib/Release/libm.a
-- Unable to find Vitis include folder
-- Could NOT find Vitis (missing: VITIS_INCLUDE_DIR) 
-- Building with -fPIC
-- Using MLIRConfig.cmake in: /home/lay/work/xilinx/llvm-project/build/lib/cmake/mlir
-- Using LLVMConfig.cmake in: /home/lay/work/xilinx/llvm-project/build/lib/cmake/llvm
-- Found v++:/data/soft/Xilinx/Vitis/2021.2/bin/v++
-- Found xchessmk:/data/soft/Xilinx/Vitis/2021.2/aietools/bin/xchessmk
-- Found libme.a:/data/soft/Xilinx/Vitis/2021.2/aietools/data/cervino/lib/Release/libme.a
-- Found AIE libc.a:/data/soft/Xilinx/Vitis/2021.2/aietools/data/cervino/lib/runtime/lib/Release/libc.a
-- Found AIE libm.a:/data/soft/Xilinx/Vitis/2021.2/aietools/data/cervino/lib/runtime/lib/Release/libm.a
-- Unable to find Vitis include folder
-- Could NOT find Vitis (missing: VITIS_INCLUDE_DIR) 
-- Could NOT find LibXAIE (missing: XILINX_XAIE_INCLUDE_DIR XILINX_XAIE_LIBS) 
-- Building with -fPIC
Translations: MLIRTargetCpp;MLIRSPIRVDeserialization;MLIRSPIRVSerialization;MLIRSPIRVBinaryUtils;MLIRSPIRVTranslateRegistration;MLIRArmNeonToLLVMIRTranslation;MLIRArmSVEToLLVMIRTranslation;MLIRAMXToLLVMIRTranslation;MLIRLLVMToLLVMIRTranslation;MLIRNVVMToLLVMIRTranslation;MLIROpenACCToLLVMIRTranslation;MLIROpenMPToLLVMIRTranslation;MLIRROCDLToLLVMIRTranslation;MLIRX86VectorToLLVMIRTranslation;MLIRTargetLLVMIRExport;MLIRToLLVMIRTranslationRegistration;MLIRTargetLLVMIRImport
-- Configuring done
-- Generating done

how to set the Vitis and LibXAIE config, and I had build LibXAIE with embeddedsw repo?

@gyreflyr
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Build the embeddedsw aienginev2 by running "make -f Makefile.Linux" in the embeddedsw/XilnxProcessorIPLib/drivers/aienginev2 directory.

Point to the LibAIE by adding this to your cmake command line:
-DLIBXAIE_DIR=/home/foo/embeddedsw/XilnxProcessorIPLib/drivers/aienginev2

You will want to update the mlir-aie/settings.sh to point to the above before running cmake. If "ninja check-aie" doesn't build correctly you might need to add AIETOOLS or CARDANO defines in settings.sh file to point to Vitis/202x.x/aietools or Vitis/2020.x/cardano.

For VCK5000 add this to cmake command line:
-DVitisSysroot=/

@HadXu
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HadXu commented May 30, 2022

I follow your advice and found

cmd

    -DLLVM_DIR=/home/lay/work/xilinx/llvm-project/build/lib/cmake/llvm \
    -DMLIR_DIR=/home/lay/work/xilinx/llvm-project/build/lib/cmake/mlir \
    -DCMAKE_MODULE_PATH=/home/lay/work/xilinx/cmakeModules \
    -DLIBXAIE_DIR=/home/lay/work/xilinx_nqdtan/embeddedsw/XilinxProcessorIPLib/drivers/aienginev2 \
    -DCMAKE_BUILD_TYPE=Debug \

and info below

-- Unable to find Vitis include folder
-- Could NOT find Vitis (missing: VITIS_INCLUDE_DIR) 
-- Could NOT find LibXAIE (missing: XILINX_XAIE_INCLUDE_DIR XILINX_XAIE_LIBS) 
-- Building with -fPIC
Translations: MLIRTargetCpp;MLIRSPIRVDeserialization;MLIRSPIRVSerialization;MLIRSPIRVBinaryUtils;MLIRSPIRVTranslateRegistration;MLIRArmNeonToLLVMIRTranslation;MLIRArmSVEToLLVMIRTranslation;MLIRAMXToLLVMIRTranslation;MLIRLLVMToLLVMIRTranslation;MLIRNVVMToLLVMIRTranslation;MLIROpenACCToLLVMIRTranslation;MLIROpenMPToLLVMIRTranslation;MLIRROCDLToLLVMIRTranslation;MLIRX86VectorToLLVMIRTranslation;MLIRTargetLLVMIRExport;MLIRToLLVMIRTranslationRegistration;MLIRTargetLLVMIRImport
-- Configuring done
-- Generating done
CMake Warning:
  Manually-specified variables were not used by the project:

    LIBXAIE_DIR

according to this info, LIBXAIE_DIR do not used.

@HadXu
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HadXu commented May 30, 2022

-- Building with -fPIC
-- Using MLIRConfig.cmake in: /home/lay/work/xilinx/llvm-project/build/lib/cmake/mlir
-- Using LLVMConfig.cmake in: /home/lay/work/xilinx/llvm-project/build/lib/cmake/llvm
-- Found v++:/data/soft/Xilinx/Vitis/2021.2/bin/v++
-- Found xchessmk:/data/soft/Xilinx/Vitis/2021.2/aietools/bin/xchessmk
-- Found libme.a:/data/soft/Xilinx/Vitis/2021.2/aietools/data/cervino/lib/Release/libme.a
-- Found AIE libc.a:/data/soft/Xilinx/Vitis/2021.2/aietools/data/cervino/lib/runtime/lib/Release/libc.a
-- Found AIE libm.a:/data/soft/Xilinx/Vitis/2021.2/aietools/data/cervino/lib/runtime/lib/Release/libm.a
-- Found Vitis include folder: /data/soft/Xilinx/Vitis/2021.2/include
-- Building with -fPIC
Translations: MLIRTargetCpp;MLIRSPIRVDeserialization;MLIRSPIRVSerialization;MLIRSPIRVBinaryUtils;MLIRSPIRVTranslateRegistration;MLIRArmNeonToLLVMIRTranslation;MLIRArmSVEToLLVMIRTranslation;MLIRAMXToLLVMIRTranslation;MLIRLLVMToLLVMIRTranslation;MLIRNVVMToLLVMIRTranslation;MLIROpenACCToLLVMIRTranslation;MLIROpenMPToLLVMIRTranslation;MLIRROCDLToLLVMIRTranslation;MLIRX86VectorToLLVMIRTranslation;MLIRTargetLLVMIRExport;MLIRToLLVMIRTranslationRegistration;MLIRTargetLLVMIRImport
-- Configuring done
-- Generating done
-- Build files have been written to: /home/lay/work/xilinx_nqdtan/mlir-aie/build
ninja: no work to do.

I had build it successfully. And I pass test. But I do not know how to run on vck5000? And I do not find a simple running on vck5000.

@HadXu
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HadXu commented May 30, 2022

Lincense need.

AIETOOLS=/data/soft/Xilinx/Vitis/2021.2/aietools python aiecc.py  ~/work/xilinx/mlir-aie/test/unit_tests/00_itsalive/aie.mlir
AIEBuild license not found !!No such file or directory
The Program xchesscc has encountered an unexpected error exiting ... AIEBuild license not found !!No such file or directory
Error encountered while running: xchesscc_wrapper -c -d -f +f +P 4 /home/lay/work/xilinx/mlir-aie/build/bin/aiecc/../../runtime_lib/chess_intrinsic_wrapper.cpp -o acdc_project/chess_intrinsic_wrapper.ll

@gyreflyr
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gyreflyr commented May 31, 2022 via email

@HadXu
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HadXu commented Jun 2, 2022

// RUN: source %S/../../../settings.sh
// RUN: aiecc.py --sysroot=%VITIS_SYSROOT% --aie-generate-xaiev2 %s -I%aie_runtime_lib% %aie_runtime_lib%/test_library.cpp %S/test.cpp -o test.elf
// RUN: %run_on_board ./test.elf

what does sysroot mean, and how to set it(on VCK5000)? Thanks.

@gyreflyr
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gyreflyr commented Jun 2, 2022

For VCK5000 add this to cmake command line:
-DVitisSysroot=/

Adding the -DVitisSysroot=/ to the cmake invocation will have cmake use the X86 host environment for include files instead of the embedded aarch64 environment.

You will also need to go into tools/aiecc/aiecc/main.py line 144 and change this:
cmd = ['clang','--target=aarch64-linux-gnu', '-std=c++11']
to this:
cmd = ['clang', '-std=c++11']
That will build x86_64 executables instead of aarch64.

If your ninja check-aie fails due to missing files, you can patch the include path to match your local environment in the tools/aiecc/aiecc/main.py lines 149-154. You will notice that line 153 points to /opt/xaiengine/include and 154 includes the /opt/xaiengine/src/libxaiengine.so library. Either create a symbolic link called /opt/xaiengine that points to your embeddedsw/XilinxProcessorIPLib/drivers/aienginev2 or change main.py to point to it.

@HadXu
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HadXu commented Jun 6, 2022

Update
I find run with --aie-generate-xaiev2

old
I followed your advice, cmd

AIETOOLS=/data/soft/Xilinx/Vitis/2021.2/aietools python aiecc.py  --sysroot=/ ~/work/xilinx/mlir-aie/test/unit_tests/01_memory_read_write/aie.mlir -I/home/lay/work/xilinx/mlir-aie/runtime_lib /home/lay/work/xilinx/mlir-aie/runtime_lib/test_library.cpp  ~/work/xilinx/mlir-aie/test/unit_tests/01_memory_read_write/test.cpp -o test.elf

but found

/home/lay/work/xilinx/mlir-aie/runtime_lib/test_library.h:97:3: error: unknown type name 'XAieGbl_Config'; did you mean 'XAie_Config'?
  XAieGbl_Config *AieConfigPtr;
  ^~~~~~~~~~~~~~
  XAie_Config
/opt/xaiengine/include/xaiengine/xaiegbl.h:185:3: note: 'XAie_Config' declared here
} XAie_Config;
  ^
In file included from /home/lay/work/xilinx/mlir-aie/runtime_lib/test_library.cpp:13:
/home/lay/work/xilinx/mlir-aie/runtime_lib/test_library.h:98:3: error: unknown type name 'XAieGbl'
  XAieGbl AieInst;

and I found those XAieGbl_Config type do not exist in aienginev2. Thanks.

@HadXu
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HadXu commented Jun 6, 2022

run with

(py38) xxx@ubuntu-MU72-SU0-00:~/work/xilinx/mlir-aie/build/bin$ AIETOOLS=/data/soft/Xilinx/Vitis/2021.2/aietools python aiecc.py  --sysroot=/ --aie-generate-xaiev2 ~/work/xilinx/mlir-aie/test/unit_tests/01_memory_read_write/aie.mlir -I/home/lay/work/xilinx/mlir-aie/runtime_lib /home/lay/work/xilinx/mlir-aie/runtime_lib/test_library.cpp  ~/work/xilinx/mlir-aie/test/unit_tests/01_memory_read_write/test.cpp -o test.elf
Found Vitis at /data/soft/Xilinx/Vitis/2021.2
chess-clang: warning: argument unused during compilation: '-I /data/soft/Xilinx/Vitis/2021.2/aietools/data/cervino/lib' [-Wunused-command-line-argument]
chess-clang: warning: argument unused during compilation: '-I /data/soft/Xilinx/Vitis/2021.2/aietools/data/cervino/lib/runtime_cxx/libcxx-lite/include' [-Wunused-command-line-argument]
chess-clang: warning: argument unused during compilation: '-I /data/soft/Xilinx/Vitis/2021.2/aietools/data/cervino/lib/runtime_cxx/libs/libcxx-9.0.0/include-lite' [-Wunused-command-line-argument]
chess-clang: warning: argument unused during compilation: '-I /data/soft/Xilinx/Vitis/2021.2/aietools/data/cervino/lib/runtime/include' [-Wunused-command-line-argument]
chess-clang: warning: argument unused during compilation: '-include aie_core.h' [-Wunused-command-line-argument]
warning: overriding the module target triple with pdarch-unknown-unknown-elf [-Woverride-module]
1 warning generated.

and generate test.elf, but look test error.

....
MW: 0x20000872000, 0x2, 0x0
MW: 0x20000872008, 0x8080, 0x8000
MW: 0x20000872000, 0x1, 0x1
MW: 0x200008b2000, 0x2, 0x0
MW: 0x200008b2008, 0x8080, 0x8000
MW: 0x200008b2000, 0x1, 0x1
R: 0x200008c100c, 0x0
R: 0x200008c100c, 0x0
ERROR After memory writes. Check [3]=14: mlir_aie_read_buffer_a(_xaie, 3) expected 14, but was 0!
R: 0x200008c1014, 0x0
R: 0x200008c1014, 0x0
ERROR After memory writes. Check [3]=14: mlir_aie_read_buffer_a(_xaie, 5) expected 8, but was 0!
R: 0x200008c1024, 0x0
R: 0x200008c1024, 0x0
ERROR After memory writes. Check [3]=14: mlir_aie_read_buffer_a(_xaie, 9) expected 14, but was 0!
Fail!
test done.

@cabreraam
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Update I find run with --aie-generate-xaiev2

/home/lay/work/xilinx/mlir-aie/runtime_lib/test_library.h:97:3: error: unknown type name 'XAieGbl_Config'; did you mean 'XAie_Config'?
XAieGbl_Config *AieConfigPtr;
^~~~~~~~~~~~~~
XAie_Config
/opt/xaiengine/include/xaiengine/xaiegbl.h:185:3: note: 'XAie_Config' declared here
} XAie_Config;
^
In file included from /home/lay/work/xilinx/mlir-aie/runtime_lib/test_library.cpp:13:
/home/lay/work/xilinx/mlir-aie/runtime_lib/test_library.h:98:3: error: unknown type name 'XAieGbl'
XAieGbl AieInst;


and I found those _**XAieGbl_Config**_ type do not exist in _**aienginev2**_. Thanks.

If you pass --aie-generate-xaiev2 to aiecc.py, it should trigger this condition in the parse_args function in cl_arguments.py. When that is triggered, xaie gets set to 2. In aiecc.py, xaie == 2 should trigger this condition, which will define -DLIBXAIENGINEV2 during compilation. In test_library.h, -DLIBXAIENGINEV2 being defined results in this code block being active (lines 35-80). That code block does not use XAieGbl_Config. So, if you're passing --aie-generate-xaiev2 correctly, that error message should not come up.

I hope this helps!

@HadXu
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HadXu commented Jun 6, 2022

Yes, you are right. Thanks. But according this link, unit test do not pass. And I do not how to debug.

@stephenneuendorffer
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@jackl-xilinx Can you look into debugging, please?

@HadXu
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HadXu commented Jun 8, 2022

@jackl-xilinx please?

@HadXu
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HadXu commented Jul 1, 2022

from this link
where can I get valid_xchess_license?

@HadXu
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HadXu commented Jul 13, 2022

For VCK5000 add this to cmake command line: -DVitisSysroot=/

Adding the -DVitisSysroot=/ to the cmake invocation will have cmake use the X86 host environment for include files instead of the embedded aarch64 environment.

You will also need to go into tools/aiecc/aiecc/main.py line 144 and change this: cmd = ['clang','--target=aarch64-linux-gnu', '-std=c++11'] to this: cmd = ['clang', '-std=c++11'] That will build x86_64 executables instead of aarch64.

If your ninja check-aie fails due to missing files, you can patch the include path to match your local environment in the tools/aiecc/aiecc/main.py lines 149-154. You will notice that line 153 points to /opt/xaiengine/include and 154 includes the /opt/xaiengine/src/libxaiengine.so library. Either create a symbolic link called /opt/xaiengine that points to your embeddedsw/XilinxProcessorIPLib/drivers/aienginev2 or change main.py to point to it.

I do not how to solve this problems according this link link, Thank you!

@gyreflyr
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gyreflyr commented Jul 13, 2022 via email

@HadXu
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HadXu commented Jul 14, 2022

I am not able to speak to how the mlir-aie team is approaching pcie host support for the vck5000. I was just attempting to affirm that after a few modifications, it was possible to run the test suite on the vck5000 hardware. Sharing library paths using the LD_LIBRARY_PATH environment variables might be helpful. export LD_LIBRARY_PATH=/opt/xaiengine/src:/opt/xilinx/xrt/lib

On Tue, Jul 12, 2022 at 10:38 PM ZhenLei Xu @.> wrote: For VCK5000 add this to cmake command line: -DVitisSysroot=/ Adding the -DVitisSysroot=/ to the cmake invocation will have cmake use the X86 host environment for include files instead of the embedded aarch64 environment. You will also need to go into tools/aiecc/aiecc/main.py line 144 and change this: cmd = ['clang','--target=aarch64-linux-gnu', '-std=c++11'] to this: cmd = ['clang', '-std=c++11'] That will build x86_64 executables instead of aarch64. If your ninja check-aie fails due to missing files, you can patch the include path to match your local environment in the tools/aiecc/aiecc/main.py lines 149-154. You will notice that line 153 points to /opt/xaiengine/include and 154 includes the /opt/xaiengine/src/libxaiengine.so library. Either create a symbolic link called /opt/xaiengine that points to your embeddedsw/XilinxProcessorIPLib/drivers/aienginev2 or change main.py to point to it. I do not how to solve this problems according this link link <#124 (comment)>, Thank you! — Reply to this email directly, view it on GitHub <#106 (comment)>, or unsubscribe https://github.com/notifications/unsubscribe-auth/AYWKQPKMOZ3FLGTZX3NVP4TVTZI57ANCNFSM5XDQHY3A . You are receiving this because you commented.Message ID: @.>

You are right. Thanks.

@HadXu HadXu closed this as completed Jul 14, 2022
fifield pushed a commit to fifield/mlir-aie that referenced this issue Nov 8, 2023
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