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Submodule yosys-src
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7 files
+12 −1 | CHANGELOG | |
+2 −2 | Makefile | |
+1 −0 | techlibs/machxo2/Makefile.inc | |
+64 −64 | techlibs/machxo2/brams_map.v | |
+227 −0 | techlibs/machxo2/cells_bb.v | |
+32 −59 | techlibs/machxo2/cells_sim.v | |
+1 −1 | techlibs/machxo2/synth_machxo2.cc |