cnnGen

• This project develops an automatic generation tool for CNNs running on FPGAs.
• Directory structure:
  • auto_tool.py: the main script for code generation.
  • code/: the generated Verilog code for the FPGA and the generated Cpp for the CPU.
  • py_dse/: python implementation of the optimized design space exploration algorithm.
  • py_sim/: some software simulators helping with debug.
  • py_plots/: the utility scripts for plotting the performance of generated design
  • config_cnn/: YAML script specifying the CNN models.
  • config_hw/: YAML script specifying the FPGA device.