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Add tcl inputs to rules_vivado. It is common to require custom tcl between the various stages, to run reports or an additional optimization stage, examine resources etc.
Additionally, this allows the inclusion of bd. To do this:
In vivado GUI, export the board design to a tcl file. Add this line to the bottom of that tcl file:
Then add the tcl to pre_synth_tcl in vivado_bitstream. You will also need to generate the wrapper and set that as the top module though.