Skip to content

Verilog implementation of various modules required for implementation of PN sequence based AES block cipher.

Notifications You must be signed in to change notification settings

ajayjha5899/enhanced_aes

Folders and files

NameName
Last commit message
Last commit date

Latest commit

 

History

5 Commits
 
 
 
 
 
 
 
 
 
 
 
 

Repository files navigation

Enhanced AES Implementation

The Advanced Encryption Standard (AES) is the most widely used symmetric block cipher today. The AES block cipher is also mandatory in several industry standards and is used in many commercial systems. Among the commercial standards that include AES are the Internet security standard IPsec, TLS, the Wi-Fi encryption standard IEEE 802.11i, the secure shell network protocol SSH (Secure Shell), almost all internet browsers like Google Chrome, Firefox, etc. and numerous security products around the world. To date, there are no attacks better than brute-force known against AES.

In this repository, we have focused on understanding the underlying steps in the AES encryption algorithm, take a look at the PN sequence based S-box and key generator and finally implemented the algorithm in Verilog and tested the implementation using NIST's AES standard test blocks in ECB mode.

Repository Sturcture

Directory Description
1_Requirements Documents detailing requirements and research.
2_Design Documents specifying designing details.
3_Implementation Source code of all modules and respective testbench.
4_Tests Documentation of tests performed.

Tools Used

Challenges faced

  • Implementation of GF(8) multiplication.
  • Implementation of encryption-decryption loopback .

Resources and references

About

Verilog implementation of various modules required for implementation of PN sequence based AES block cipher.

Resources

Stars

Watchers

Forks

Releases

No releases published

Packages

No packages published