Some debugging tehniques

[veso266]

Hi there, I managed to program my FPGA with this (if you remember this issue: #40

But now I am facing a problem, that I have no video output (and no serial output), even if I assigned all the pins to the designated ones (when I press CPU reset, I see the screen detects something, but I get no signal at the end), the board also does respond depending if I select UART or VGA with: https://github.com/alangarf/apple-one/blob/1d21ed1f6369cb94089a9bbe188d8e7db9e3eb08/rtl/boards/blackice2/apple1_hx8k.v#LL116C9-L116C67

(if its .ps2_select(1'b0), the screen does not respond (it doesn't even detect anything), if its .ps2_select(1'b1), the screen detect something but after that goes into no signal state

I saw there is some wire [15:0] pc_monitor; I can use:

apple-one/rtl/apple1.v

Line 54 in 1d21ed1

output [15:0] pc_monitor // spy for program counter / debugging

now, how is this meant to be used? (I did wire it direcly to my 16 leds and when I press CPU reset, leds do come on, but don't move at all, if I press the button again, different leds come one (again when they come on they stay on forever)

So something is happening it appears, but now I have to figure out what

I did start with this example: https://github.com/alangarf/apple-one/blob/master/rtl/boards/blackice2/apple1_hx8k.v#LL116C9-L116C67

because it seamed to be the closest to my boards (I also have 100Mhz clock and 4bit VGA)

If it helps, here is my constraint file

##Pin definitions

## Clock signal
set_property -dict { PACKAGE_PIN E3    IOSTANDARD LVCMOS33 } [get_ports { CLK100MHZ }]; #IO_L12P_T1_MRCC_35 Sch=clk100mhz
#create_clock -add -name sys_clk_pin -period 10.00 -waveform {0 5} [get_ports {CLK100MHZ}];
#set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets CLK100MHZ_IBUF]

# ps/2 keyboard
##USB HID (PS/2)
set_property -dict { PACKAGE_PIN F4    IOSTANDARD LVCMOS33 } [get_ports { PS2_KBCLK }]; #IO_L13P_T2_MRCC_35 Sch=ps2_clk
set_property -dict { PACKAGE_PIN B2    IOSTANDARD LVCMOS33 } [get_ports { PS2_KBDAT }]; #IO_L10N_T1_AD15N_35 Sch=ps2_data

##VGA Connector
set_property -dict { PACKAGE_PIN A3    IOSTANDARD LVCMOS33 } [get_ports { VGA_R[0] }]; #IO_L8N_T1_AD14N_35 Sch=vga_r[0]
set_property -dict { PACKAGE_PIN B4    IOSTANDARD LVCMOS33 } [get_ports { VGA_R[1] }]; #IO_L7N_T1_AD6N_35 Sch=vga_r[1]
set_property -dict { PACKAGE_PIN C5    IOSTANDARD LVCMOS33 } [get_ports { VGA_R[2] }]; #IO_L1N_T0_AD4N_35 Sch=vga_r[2]
set_property -dict { PACKAGE_PIN A4    IOSTANDARD LVCMOS33 } [get_ports { VGA_R[3] }]; #IO_L8P_T1_AD14P_35 Sch=vga_r[3]
set_property -dict { PACKAGE_PIN C6    IOSTANDARD LVCMOS33 } [get_ports { VGA_G[0] }]; #IO_L1P_T0_AD4P_35 Sch=vga_g[0]
set_property -dict { PACKAGE_PIN A5    IOSTANDARD LVCMOS33 } [get_ports { VGA_G[1] }]; #IO_L3N_T0_DQS_AD5N_35 Sch=vga_g[1]
set_property -dict { PACKAGE_PIN B6    IOSTANDARD LVCMOS33 } [get_ports { VGA_G[2] }]; #IO_L2N_T0_AD12N_35 Sch=vga_g[2]
set_property -dict { PACKAGE_PIN A6    IOSTANDARD LVCMOS33 } [get_ports { VGA_G[3] }]; #IO_L3P_T0_DQS_AD5P_35 Sch=vga_g[3]
set_property -dict { PACKAGE_PIN B7    IOSTANDARD LVCMOS33 } [get_ports { VGA_B[0] }]; #IO_L2P_T0_AD12P_35 Sch=vga_b[0]
set_property -dict { PACKAGE_PIN C7    IOSTANDARD LVCMOS33 } [get_ports { VGA_B[1] }]; #IO_L4N_T0_35 Sch=vga_b[1]
set_property -dict { PACKAGE_PIN D7    IOSTANDARD LVCMOS33 } [get_ports { VGA_B[2] }]; #IO_L6N_T0_VREF_35 Sch=vga_b[2]
set_property -dict { PACKAGE_PIN D8    IOSTANDARD LVCMOS33 } [get_ports { VGA_B[3] }]; #IO_L4P_T0_35 Sch=vga_b[3]
set_property -dict { PACKAGE_PIN B11   IOSTANDARD LVCMOS33 } [get_ports { VGA_HS }]; #IO_L4P_T0_15 Sch=vga_hs
set_property -dict { PACKAGE_PIN B12   IOSTANDARD LVCMOS33 } [get_ports { VGA_VS }]; #IO_L3N_T0_DQS_AD1N_15 Sch=vga_vs

##USB-RS232 Interface
set_property -dict { PACKAGE_PIN C4    IOSTANDARD LVCMOS33 } [get_ports { UART_TXD }]; #IO_L7P_T1_AD6P_35 Sch=uart_txd_in
set_property -dict { PACKAGE_PIN D4    IOSTANDARD LVCMOS33 } [get_ports { UART_RXD }]; #IO_L11N_T1_SRCC_35 Sch=uart_rxd_out
set_property -dict { PACKAGE_PIN D3    IOSTANDARD LVCMOS33 } [get_ports { UART_CTS }]; #IO_L12N_T1_MRCC_35 Sch=uart_cts
#set_property -dict { PACKAGE_PIN E5    IOSTANDARD LVCMOS33 } [get_ports { UART_RTS }]; #IO_L5N_T0_AD13N_35 Sch=uart_rts

# RESET BUTTON / SOUTH on the board
set_property -dict { PACKAGE_PIN C12   IOSTANDARD LVCMOS33 } [get_ports { RESETN_BTN }]; #IO_L3P_T0_DQS_AD1P_15 Sch=cpu_resetn

# INPUT SELECTION SWITCH (PS/2 vs. UART)
set_property -dict { PACKAGE_PIN J15   IOSTANDARD LVCMOS33 } [get_ports { SWITCH }]; #IO_L24N_T3_RS0_15 Sch=sw[0]

## LEDs
set_property -dict { PACKAGE_PIN H17   IOSTANDARD LVCMOS33 } [get_ports { LED[0] }]; #IO_L18P_T2_A24_15 Sch=led[0]
set_property -dict { PACKAGE_PIN K15   IOSTANDARD LVCMOS33 } [get_ports { LED[1] }]; #IO_L24P_T3_RS1_15 Sch=led[1]
set_property -dict { PACKAGE_PIN J13   IOSTANDARD LVCMOS33 } [get_ports { LED[2] }]; #IO_L17N_T2_A25_15 Sch=led[2]
set_property -dict { PACKAGE_PIN N14   IOSTANDARD LVCMOS33 } [get_ports { LED[3] }]; #IO_L8P_T1_D11_14 Sch=led[3]
set_property -dict { PACKAGE_PIN R18   IOSTANDARD LVCMOS33 } [get_ports { LED[4] }]; #IO_L7P_T1_D09_14 Sch=led[4]
set_property -dict { PACKAGE_PIN V17   IOSTANDARD LVCMOS33 } [get_ports { LED[5] }]; #IO_L18N_T2_A11_D27_14 Sch=led[5]
set_property -dict { PACKAGE_PIN U17   IOSTANDARD LVCMOS33 } [get_ports { LED[6] }]; #IO_L17P_T2_A14_D30_14 Sch=led[6]
set_property -dict { PACKAGE_PIN U16   IOSTANDARD LVCMOS33 } [get_ports { LED[7] }]; #IO_L18P_T2_A12_D28_14 Sch=led[7]
set_property -dict { PACKAGE_PIN V16   IOSTANDARD LVCMOS33 } [get_ports { LED[8] }]; #IO_L16N_T2_A15_D31_14 Sch=led[8]
set_property -dict { PACKAGE_PIN T15   IOSTANDARD LVCMOS33 } [get_ports { LED[9] }]; #IO_L14N_T2_SRCC_14 Sch=led[9]
set_property -dict { PACKAGE_PIN U14   IOSTANDARD LVCMOS33 } [get_ports { LED[10] }]; #IO_L22P_T3_A05_D21_14 Sch=led[10]
set_property -dict { PACKAGE_PIN T16   IOSTANDARD LVCMOS33 } [get_ports { LED[11] }]; #IO_L15N_T2_DQS_DOUT_CSO_B_14 Sch=led[11]
set_property -dict { PACKAGE_PIN V15   IOSTANDARD LVCMOS33 } [get_ports { LED[12] }]; #IO_L16P_T2_CSI_B_14 Sch=led[12]
set_property -dict { PACKAGE_PIN V14   IOSTANDARD LVCMOS33 } [get_ports { LED[13] }]; #IO_L22N_T3_A04_D20_14 Sch=led[13]
set_property -dict { PACKAGE_PIN V12   IOSTANDARD LVCMOS33 } [get_ports { LED[14] }]; #IO_L20N_T3_A07_D23_14 Sch=led[14]
set_property -dict { PACKAGE_PIN V11   IOSTANDARD LVCMOS33 } [get_ports { LED[15] }]; #IO_L21N_T3_DQS_A06_D22_14 Sch=led[15]

and here is my apple1_nexsys_a7_top.v

`timescale 1ns / 1ps
module apple1_nexsys_a7_top #(
    parameter BASIC_FILENAME      = "../../../roms/basic.hex",
    parameter FONT_ROM_FILENAME   = "../../../roms/vga_font_bitreversed.hex",
    parameter RAM_FILENAME        = "../../../roms/ram.hex",
    parameter VRAM_FILENAME       = "../../../roms/vga_vram.bin",
    parameter WOZMON_ROM_FILENAME = "../../../roms/wozmon.hex"
) (
    input  CLK100MHZ,             // 100 MHz board clock

    // I/O interface to computer
    input  UART_RXD,         // asynchronous serial data input from computer
    output UART_TXD,         // asynchronous serial data output to computer
    output UART_CTS,        // clear to send flag to computer - not used

    // I/O interface to keyboard
    input PS2_KBCLK,          // PS/2 keyboard serial clock input
    input PS2_KBDAT,          // PS/2 keyboard serial data input
    
    input   RESETN_BTN,         // Button for RESET
    input   SWITCH,             // Switch between PS/2 input and UART

    // Outputs to VGA display
    output VGA_HS,              // hozizontal VGA sync pulse
    output VGA_VS,              // vertical VGA sync pulse

    output [3:0] VGA_R,     // red VGA signal
    output [3:0] VGA_G,     // green VGA signal
    output [3:0] VGA_B,     // blue VGA signal

    // Debugging ports
    output [15:0] LED
    //input [1:0] button      // 2 buttons on board
);

    //////////////////////////////////////////////////////////////////////////    
    // DEBUGGING
    //assign LED[0] = 1;
    //assign LED[1] = reset_n;
    //assign LED[2] = clr_screen_n;
    //assign LED[3] = 0;
    
    // Debugging ports
    wire [15:0] pc_monitor;    // spy for program counter / debugging

    wire clk25;
    
    wire rst_n;    
    assign rst_n = ~RESETN_BTN;
    
    assign LED = pc_monitor;

    // ===============================================================
    // System Clock generation (25MHz)
    // ===============================================================

    reg [1:0]  clkpre = 2'b00;     // prescaler, from 100MHz to 25MHz

    always @(posedge CLK100MHZ)
      begin
        clkpre <= clkpre + 1;
      end
    wire clk25 = clkpre[1];

    wire vga_bit;

    // set the monochrome base colour here..
    assign VGA_R[3:0] = vga_bit ? 4'b1000 : 4'b0000;
    assign VGA_G[3:0] = vga_bit ? 4'b1111 : 4'b0000;
    assign VGA_B[3:0] = vga_bit ? 4'b1000 : 4'b0000;

    // apple one main system
    apple1 #(
        .BASIC_FILENAME (BASIC_FILENAME),
        .FONT_ROM_FILENAME (FONT_ROM_FILENAME),
        .RAM_FILENAME (RAM_FILENAME),
        .VRAM_FILENAME (VRAM_FILENAME),
        .WOZMON_ROM_FILENAME (WOZMON_ROM_FILENAME)
    ) apple1_top(
        .clk25(clk25),
        .rst_n(rst_n),         // we don't have any reset pulse..

        .uart_rx(UART_RXD),
        .uart_tx(UART_TXD),
        .uart_cts(UART_CTS),

        .ps2_clk(PS2_KBCLK),
        .ps2_din(PS2_KBDAT),
        .ps2_select(1'b1),       // PS/2 disabled, UART TX enabled
        //.ps2_select(SWITCH),       // PS/2 enabled, UART TX disabled
        //.ps2_select(1'b1),       // PS/2 enabled, UART TX disabled
        //.ps2_select(1'b0),       // PS/2 disabled, UART TX enabled

        .vga_h_sync(VGA_HS),
        .vga_v_sync(VGA_VS),
        .vga_red(vga_bit),
        .vga_grn(vga_bit),
        .vga_blu(vga_bit),
        .vga_cls(~clr_screen_n),
        .vga_cls(~rst_n),
        .pc_monitor(pc_monitor)
    );
endmodule

As I said, it does compile, it does run (but for now, I have no way of figuring out whats going on 😄 )

Sorry for a lot of questions, I am just starting to play with FPGA (I already got VGA example working (I managed to fill the screen with blue), but am otherwise a noob 😄

[alangarf]

Sorry, hopefully you figured it out. I can't help diagnose issues and teach, my time is very limited.
Closing Issue.

Thanks.