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RISCImposter: cycle accurate RISC CPU simulation

Author	Ali Farazdaghi
Version	Revision: 1
Copyright	MIT

Table of Contents:

• How it works
• Available CPU Architectures
  • MIPS

How it works:

Imposter will read INSTRUCTION_LOCATION defined in src/main.c and load the instructions into an array. Then it will initialize the CPU using cpu_init() and clock the CPU using cpu_tick() and cpu_tock().

Available CPU Architectures:

MIPS:

The src/arch/mips includes source code for simulating MIPS CPU.

• components.h: Components used in MIPS arch, like: sign bit extender and ALU.

• defs.h: Some Definitions describing the arch.

• hazard.h: Hazard detection unit.

• memory.h: Definitions and Functions for handling memory access.

• pipeline.h: Definitions describing pipeline register.

• stages.h: Functions describing what should happen at each stage during rising and falling of one clock cycle.