s390x: update to upstream revision 7e9113cb7

auxprogs/genoffsets.c

@@ -635,22 +635,38 @@ int main(int argc, char **argv)
    GENOFFSET(S390X,s390x,a13);
    GENOFFSET(S390X,s390x,a14);
    GENOFFSET(S390X,s390x,a15);
-   GENOFFSET(S390X,s390x,f0);
-   GENOFFSET(S390X,s390x,f1);
-   GENOFFSET(S390X,s390x,f2);
-   GENOFFSET(S390X,s390x,f3);
-   GENOFFSET(S390X,s390x,f4);
-   GENOFFSET(S390X,s390x,f5);
-   GENOFFSET(S390X,s390x,f6);
-   GENOFFSET(S390X,s390x,f7);
-   GENOFFSET(S390X,s390x,f8);
-   GENOFFSET(S390X,s390x,f9);
-   GENOFFSET(S390X,s390x,f10);
-   GENOFFSET(S390X,s390x,f11);
-   GENOFFSET(S390X,s390x,f12);
-   GENOFFSET(S390X,s390x,f13);
-   GENOFFSET(S390X,s390x,f14);
-   GENOFFSET(S390X,s390x,f15);
+   GENOFFSET(S390X,s390x,v0);
+   GENOFFSET(S390X,s390x,v1);
+   GENOFFSET(S390X,s390x,v2);
+   GENOFFSET(S390X,s390x,v3);
+   GENOFFSET(S390X,s390x,v4);
+   GENOFFSET(S390X,s390x,v5);
+   GENOFFSET(S390X,s390x,v6);
+   GENOFFSET(S390X,s390x,v7);
+   GENOFFSET(S390X,s390x,v8);
+   GENOFFSET(S390X,s390x,v9);
+   GENOFFSET(S390X,s390x,v10);
+   GENOFFSET(S390X,s390x,v11);
+   GENOFFSET(S390X,s390x,v12);
+   GENOFFSET(S390X,s390x,v13);
+   GENOFFSET(S390X,s390x,v14);
+   GENOFFSET(S390X,s390x,v15);
+   GENOFFSET(S390X,s390x,v16);
+   GENOFFSET(S390X,s390x,v17);
+   GENOFFSET(S390X,s390x,v18);
+   GENOFFSET(S390X,s390x,v19);
+   GENOFFSET(S390X,s390x,v20);
+   GENOFFSET(S390X,s390x,v21);
+   GENOFFSET(S390X,s390x,v22);
+   GENOFFSET(S390X,s390x,v23);
+   GENOFFSET(S390X,s390x,v24);
+   GENOFFSET(S390X,s390x,v25);
+   GENOFFSET(S390X,s390x,v26);
+   GENOFFSET(S390X,s390x,v27);
+   GENOFFSET(S390X,s390x,v28);
+   GENOFFSET(S390X,s390x,v29);
+   GENOFFSET(S390X,s390x,v30);
+   GENOFFSET(S390X,s390x,v31);
    GENOFFSET(S390X,s390x,r0);
    GENOFFSET(S390X,s390x,r1);
    GENOFFSET(S390X,s390x,r2);

common.mk

@@ -78,6 +78,7 @@ NORMAL_OBJS = \
 	priv/host_generic_simd128.o	\
 	priv/host_generic_simd256.o	\
 	priv/host_generic_reg_alloc2.o	\
+	priv/host_generic_reg_alloc3.o	\
 	priv/guest_generic_x87.o	\
 	priv/guest_generic_bb_to_IR.o	\
 	priv/guest_x86_helpers.o	\

priv/guest_amd64_toIR.c

@@ -29737,6 +29737,7 @@ Long dis_ESC_0F38__VEX (
       if (have66noF2noF3(pfx)) {
          delta = dis_FMA( vbi, pfx, delta, opc );
          *uses_vvvv = True;
+         dres->hint = Dis_HintVerbose;
          goto decode_success;
       }
       break;
@@ -31862,15 +31863,20 @@ Long dis_ESC_0F3A__VEX (
          /* else fall though; dis_PCMPxSTRx failed to decode it */
       }
       break;
+
    case 0x5c: case 0x5d: case 0x5e: case 0x5f:
    case 0x68: case 0x69: case 0x6a: case 0x6b:
    case 0x6c: case 0x6d: case 0x6e: case 0x6f:
    case 0x78: case 0x79: case 0x7a: case 0x7b:
    case 0x7c: case 0x7d: case 0x7e: case 0x7f:
+      /* FIXME: list the instructions decoded here */
       if (have66noF2noF3(pfx) && 0==getVexL(pfx)/*128*/) {
          Long delta0 = delta;
          delta = dis_FMA4( pfx, delta, opc, uses_vvvv, vbi );
-         if (delta > delta0) goto decode_success;
+         if (delta > delta0) {
+            dres->hint = Dis_HintVerbose;
+            goto decode_success;
+         }
          /* else fall though; dis_FMA4 failed to decode it */
       }
       break;
@@ -31983,6 +31989,7 @@ DisResult disInstr_AMD64_WRK (
    dres.len         = 0;
    dres.continueAt  = 0;
    dres.jk_StopHere = Ijk_INVALID;
+   dres.hint        = Dis_HintNone;
    *expect_CAS = False;
 
    vassert(guest_RIP_next_assumed == 0);

priv/guest_arm64_toIR.c

@@ -14315,6 +14315,7 @@ Bool disInstr_ARM64_WRK (
    dres->len         = 4;
    dres->continueAt  = 0;
    dres->jk_StopHere = Ijk_INVALID;
+   dres->hint        = Dis_HintNone;
 
    /* At least this is simple on ARM64: insns are all 4 bytes long, and
       4-aligned.  So just fish the whole thing out of memory right now

priv/guest_arm_toIR.c

@@ -16173,6 +16173,7 @@ DisResult disInstr_ARM_WRK (
    dres.len         = 4;
    dres.continueAt  = 0;
    dres.jk_StopHere = Ijk_INVALID;
+   dres.hint        = Dis_HintNone;
 
    /* Set default actions for post-insn handling of writes to r15, if
       required. */
@@ -19069,6 +19070,7 @@ DisResult disInstr_THUMB_WRK (
    dres.len         = 2;
    dres.continueAt  = 0;
    dres.jk_StopHere = Ijk_INVALID;
+   dres.hint        = Dis_HintNone;
 
    /* Set default actions for post-insn handling of writes to r15, if
       required. */

priv/guest_generic_bb_to_IR.c

@@ -240,6 +240,13 @@ IRSB* bb_to_IR (
       vassert((offB_GUEST_IP % 8) == 0);
    }
 
+   /* Although we will try to disassemble up to vex_control.guest_max_insns
+      insns into the block, the individual insn assemblers may hint to us that a
+      disassembled instruction is verbose.  In that case we will lower the limit
+      so as to ensure that the JIT doesn't run out of space.  See bug 375839 for
+      the motivating example. */
+   Int guest_max_insns_really = vex_control.guest_max_insns;
+
    /* Start a new, empty extent. */
    vge->n_used  = 1;
    vge->base[0] = guest_IP_bbstart;
@@ -287,7 +294,7 @@ IRSB* bb_to_IR (
 
    /* Process instructions. */
    while (True) {
-      vassert(n_instrs < vex_control.guest_max_insns);
+      vassert(n_instrs < guest_max_insns_really);
 
       /* Regardless of what chase_into_ok says, is chasing permissible
          at all right now?  Set resteerOKfn accordingly. */
@@ -386,6 +393,23 @@ IRSB* bb_to_IR (
       if (n_cond_resteers_allowed == 0)
          vassert(dres.whatNext != Dis_ResteerC);
 
+      /* If the disassembly function passed us a hint, take note of it. */
+      if (LIKELY(dres.hint == Dis_HintNone)) {
+         /* Do nothing */
+      } else {
+         vassert(dres.hint == Dis_HintVerbose);
+         /* The current insn is known to be verbose.  Lower the max insns limit
+            if necessary so as to avoid running the JIT out of space in the
+            event that we've encountered the start of a long sequence of them.
+            This is expected to be a very rare event.  In any case the remaining
+            limit (30 insns) is still so high that most blocks will terminate
+            anyway before then.  So this is very unlikely to give a perf hit in
+            practice.  See bug 375839 for the motivating example. */
+         if (guest_max_insns_really > 30) {
+            guest_max_insns_really = 30;
+         }
+      }
+
       /* Fill in the insn-mark length field. */
       vassert(first_stmt_idx >= 0 && first_stmt_idx < irsb->stmts_used);
       imark = irsb->stmts[first_stmt_idx];
@@ -452,7 +476,7 @@ IRSB* bb_to_IR (
          case Dis_Continue:
             vassert(dres.continueAt == 0);
             vassert(dres.jk_StopHere == Ijk_INVALID);
-            if (n_instrs < vex_control.guest_max_insns && 
+            if (n_instrs < guest_max_insns_really &&
                 vge->len[vge->n_used-1] < vex_control.guest_max_bytes) {
                /* keep going */
             } else {

priv/guest_generic_bb_to_IR.h

@@ -76,10 +76,16 @@ typedef
          Dis_ResteerC:  (speculatively, of course) followed a
                         conditional branch; continue at 'continueAt'
       */
-      enum { Dis_StopHere, Dis_Continue, 
+      enum { Dis_StopHere=0x10, Dis_Continue, 
              Dis_ResteerU, Dis_ResteerC } whatNext;
 
-      /* For Dis_StopHere, we need to end the block and create a
+      /* Any other hints that we should feed back to the disassembler?
+         Dis_HintNone:     no hint
+         Dis_HintVerbose:  this insn potentially generates a lot of code
+      */
+      enum { Dis_HintNone=0x20, Dis_HintVerbose } hint;
+
+      /* For whatNext==Dis_StopHere, we need to end the block and create a
          transfer to whatever the NIA is.  That will have presumably
          been set by the IR generated for this insn.  So we need to
          know the jump kind to use.  Should Ijk_INVALID in other Dis_
@@ -89,7 +95,6 @@ typedef
       /* For Dis_Resteer, this is the guest address we should continue
          at.  Otherwise ignored (should be zero). */
       Addr   continueAt;
-
    }
 
    DisResult;

priv/guest_mips_toIR.c

@@ -12062,6 +12062,7 @@ static DisResult disInstr_MIPS_WRK ( Bool(*resteerOkFn) (/*opaque */void *,
    dres.len = 0;
    dres.continueAt = 0;
    dres.jk_StopHere = Ijk_INVALID;
+   dres.hint        = Dis_HintNone;
 
    delay_slot_branch = likely_delay_slot = delay_slot_jump = False;
 

priv/guest_ppc_toIR.c

@@ -27401,6 +27401,7 @@ DisResult disInstr_PPC_WRK (
    dres.len         = 0;
    dres.continueAt  = 0;
    dres.jk_StopHere = Ijk_INVALID;
+   dres.hint        = Dis_HintNone;
 
    /* At least this is simple on PPC32: insns are all 4 bytes long, and
       4-aligned.  So just fish the whole thing out of memory right now
@@ -29111,6 +29112,7 @@ DisResult disInstr_PPC ( IRSB*        irsb_IN,
       dres.whatNext    = Dis_StopHere;
       dres.jk_StopHere = Ijk_NoDecode;
       dres.continueAt   = 0;
+      dres.hint        = Dis_HintNone;
       return dres;
    }
 

priv/guest_s390_defs.h

@@ -8,7 +8,7 @@
    This file is part of Valgrind, a dynamic binary instrumentation
    framework.
 
-   Copyright IBM Corp. 2010-2015
+   Copyright IBM Corp. 2010-2017
 
    This program is free software; you can redistribute it and/or
    modify it under the terms of the GNU General Public License as
@@ -21,9 +21,7 @@
    General Public License for more details.
 
    You should have received a copy of the GNU General Public License
-   along with this program; if not, write to the Free Software
-   Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
-   02110-1301, USA.
+   along with this program; if not, see <http://www.gnu.org/licenses/>.
 
    The GNU General Public License is contained in the file COPYING.
 */
@@ -80,7 +78,8 @@ ULong s390x_dirtyhelper_STCKF(ULong *addr);
 ULong s390x_dirtyhelper_STCKE(ULong *addr);
 ULong s390x_dirtyhelper_STFLE(VexGuestS390XState *guest_state, ULong *addr);
 void  s390x_dirtyhelper_CUxy(UChar *addr, ULong data, ULong num_bytes);
-
+ULong s390x_dirtyhelper_vec_op(VexGuestS390XState *guest_state,
+                               ULong details);
 ULong s390_do_cu12_cu14_helper1(UInt byte1, UInt etf3_and_m3_is_1);
 ULong s390_do_cu12_helper2(UInt byte1, UInt byte2, UInt byte3, UInt byte4,
                            ULong stuff);
@@ -94,7 +93,9 @@ UInt  s390_do_cvb(ULong decimal);
 ULong s390_do_cvd(ULong binary);
 ULong s390_do_ecag(ULong op2addr);
 UInt  s390_do_pfpo(UInt gpr0);
-
+void  s390x_dirtyhelper_PPNO_query(VexGuestS390XState *guest_state, ULong r1, ULong r2);
+ULong  s390x_dirtyhelper_PPNO_sha512(VexGuestS390XState *guest_state, ULong r1, ULong r2);
+void  s390x_dirtyhelper_PPNO_sha512_load_param_block( void );
 /* The various ways to compute the condition code. */
 enum {
    S390_CC_OP_BITWISE = 0,
@@ -157,7 +158,9 @@ enum {
    S390_CC_OP_DFP_128_TO_INT_64 = 57,
    S390_CC_OP_PFPO_32 = 58,
    S390_CC_OP_PFPO_64 = 59,
-   S390_CC_OP_PFPO_128 = 60
+   S390_CC_OP_PFPO_128 = 60,
+   S390_CC_OP_MUL_32 = 61,
+   S390_CC_OP_MUL_64 = 62
 };
 
 /*------------------------------------------------------------*/
@@ -254,6 +257,80 @@ UInt s390_calculate_cond(ULong mask, ULong op, ULong dep1, ULong dep2,
 /* Last target instruction for the EX helper */
 extern ULong last_execute_target;
 
+/*------------------------------------------------------------*/
+/*--- Vector helpers.                                      ---*/
+/*------------------------------------------------------------*/
+
+/* Vector operatons passed to s390x_dirtyhelper_vec_op(...) helper.
+   Please don't change ordering of elements and append new items
+   before  S390_VEC_OP_LAST. */
+enum {
+   S390_VEC_OP_INVALID = 0,
+   S390_VEC_OP_VPKS = 1,
+   S390_VEC_OP_VPKLS = 2,
+   S390_VEC_OP_VFAE = 3,
+   S390_VEC_OP_VFEE = 4,
+   S390_VEC_OP_VFENE = 5,
+   S390_VEC_OP_VISTR = 6,
+   S390_VEC_OP_VSTRC = 7,
+   S390_VEC_OP_VCEQ = 8,
+   S390_VEC_OP_VTM = 9,
+   S390_VEC_OP_VGFM = 10,
+   S390_VEC_OP_VGFMA = 11,
+   S390_VEC_OP_VMAH = 12,
+   S390_VEC_OP_VMALH = 13,
+   S390_VEC_OP_VCH = 14,
+   S390_VEC_OP_VCHL = 15,
+   S390_VEC_OP_VFCE = 16,
+   S390_VEC_OP_VFCH = 17,
+   S390_VEC_OP_VFCHE = 18,
+   S390_VEC_OP_VFTCI = 19,
+   S390_VEC_OP_LAST = 20 // supposed to be the last element in enum
+} s390x_vec_op_t;
+
+/* Arguments of s390x_dirtyhelper_vec_op(...) which are packed into one
+   ULong variable.
+ */
+typedef union {
+   struct {
+      unsigned int op : 8;        // should be an element of s390x_vec_op_t
+      unsigned int v1 : 5;        // result of operation
+      unsigned int v2 : 5;        // argument one of operation
+      unsigned int v3 : 5;        // argument two of operation or
+                                  // zero for unary operations
+
+      unsigned int v4 : 5;        // argument two of operation or
+                                  // zero for unary and binary operations
+
+      unsigned int m4 : 4;        // field m4 of insn or zero if it's missing
+      unsigned int m5 : 4;        // field m5 of insn or zero if it's missing
+      unsigned int m6 : 4;        // field m6 of insn or zero if it's missing
+      unsigned int i3 : 12;       // field i3 of insn or zero if it's missing
+      unsigned int read_only: 1;  // don't write result to Guest State
+      unsigned int reserved : 11; // reserved for future
+   };
+   ULong serialized;
+} s390x_vec_op_details_t;
+
+STATIC_ASSERT(sizeof(s390x_vec_op_details_t) == sizeof(ULong));
+
+/* Macro definitions for opcodes that are not generally available.
+
+   The values to be encoded in those fields must be integer values in
+   hexadecimal notation without a leading 0x.
+   E.g. VRX_VXBD(e7, 1, 0, 3, 0000, 0, 06) is equal to "vl %%v1, 0(%%r3)\n\t"
+*/
+#define VRX_VXBD(op1, v1, x2, b2, d2, rxb, op2)  \
+            ".short 0x" #op1 #v1 #x2 "\n\t .int  0x" #b2 #d2 "0" #rxb #op2 "\n\t"
+#define VRR_VVVMM(op1, v1, v2, v3, m5, m4, rxb, op2) \
+            ".short 0x" #op1 #v1 #v2 "\n\t .int  0x" #v3 "0" #m5 "0" #m4 #rxb #op2 "\n\t"
+
+#define VL(v1, x2, b2, d2, rxb)                VRX_VXBD(e7, v1, x2, b2, d2, rxb, 06)
+#define VST(v1, x2, b2, d2, rxb)               VRX_VXBD(e7, v1, x2, b2, d2, rxb, 0e)
+#define VPKS(v1, v2, v3, m4, m5, rxb)          VRR_VVVMM(e7, v1, v2, v3, m5, m4, rxb, 97)
+#define VPKLS(v1, v2, v3, m4, m5, rxb)         VRR_VVVMM(e7, v1, v2, v3, m5, m4, rxb, 95)
+
+
 /*---------------------------------------------------------------*/
 /*--- end                                   guest_s390_defs.h ---*/
 /*---------------------------------------------------------------*/