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fix warning: passing argument 4 of up_x11initialize from incompatible… #100
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… pointer type Change-Id: I8fbb506d104dd6a0c41c86ca977e28097694910b Signed-off-by: chao.an <anchao@xiaomi.com>
Hmmm... I have already merged this. But looking at your title, I think that size_t would not be the best type. uintptr_t is the integer type that is guranteed to be wide enough to hold a pointer. |
size_t * is the correct type since fb_planeinfo_s::fblen is size_t |
Okay I understand. It is hard to review code when you look only at differences. It is easy to make a mistake. I didn't notice that it was a pointer. I thought it was just a change from a unsigned int changed to size_t so that you could pass a pointer as an integer. In this case the pointers are all the same size, and the width of the integer type is not the critical issue. It is just the typing of the pointer. My mistake. Thanks for your clarification. |
…umb code The option '-mthumb' is only valid for C source files and it is not passed to the assembler. If 'thumb' is not considered in some assembly projects, the system will generate 'undefined instructions' when running incompatible instruction: arm_undefinedinsn: Undefined instruction at 0x380cfc98 This assembly file should be compiled with .thumb but it doesn't: 380cfc90 <hobot_i8_i32_gemm_nn_m4_n8_neon>: 380cfc90: e92d4ff0 push {r4, r5, r6, r7, r8, r9, sl, fp, lr} 380cfc94: ed2d8b10 vpush {d8-d15} 380cfc98: e59d4064 ldr r4, [sp, apache#100] ; 0x64 <-- Undefined instruction 380cfc9c: e59d5068 ldr r5, [sp, apache#104] ; 0x68 380cfca0: e59d606c ldr r6, [sp, apache#108] ; 0x6c 380cfca4: e59d7070 ldr r7, [sp, apache#112] ; 0x70 380cfca8: e1a08120 lsr r8, r0, #2 380cfcac: e1a091a1 lsr r9, r1, #3 380cfcb0: e1a0a122 lsr sl, r2, #2 After enable thumb: .syntax unified .thumb or -Wa,-mthumb .Lhobot_i8_i32_gemm_nn_m4_n8_neon: 38001100: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 38001104: ed2d 8b10 vpush {d8-d15} 38001108: 9c19 ldr r4, [sp, apache#100] ; 0x64 3800110a: 9d1a ldr r5, [sp, apache#104] ; 0x68 3800110c: 9e1b ldr r6, [sp, apache#108] ; 0x6c 3800110e: 9f1c ldr r7, [sp, apache#112] ; 0x70 38001110: ea4f 0890 mov.w r8, r0, lsr #2 38001114: ea4f 09d1 mov.w r9, r1, lsr #3 38001118: ea4f 0a92 mov.w sl, r2, lsr #2 This commit will enable the thumb option of the assembly file by default, so that when compiling the assembly file, the machine code and the system will be in a consistent state. ---------------------------------------------------------------- https://gcc.gnu.org/onlinedocs/gcc-4.5.2/gcc/ARM-Options.html GCC Manual: -mthumb Generate code for the Thumb instruction set. The default is to use the 32-bit ARM instruction set. This option automatically enables either 16-bit Thumb-1 or mixed 16/32-bit Thumb-2 instructions based on the -mcpu=name and -march=name options. ** This option is not passed to the assembler. ** ** If you want to force assembler files to be interpreted as Thumb code, either add a `.thumb' directive to the source or pass the -mthumb option directly to the assembler by prefixing it with -Wa. ** Signed-off-by: chao an <anchao@xiaomi.com>
…umb code The option '-mthumb' is only valid for C source files and it is not passed to the assembler. If 'thumb' is not considered in some assembly projects, the system will generate 'undefined instructions' when running incompatible instruction: arm_undefinedinsn: Undefined instruction at 0x380cfc98 This assembly file should be compiled with .thumb but it doesn't: 380cfc90 <hobot_i8_i32_gemm_nn_m4_n8_neon>: 380cfc90: e92d4ff0 push {r4, r5, r6, r7, r8, r9, sl, fp, lr} 380cfc94: ed2d8b10 vpush {d8-d15} 380cfc98: e59d4064 ldr r4, [sp, #100] ; 0x64 <-- Undefined instruction 380cfc9c: e59d5068 ldr r5, [sp, #104] ; 0x68 380cfca0: e59d606c ldr r6, [sp, #108] ; 0x6c 380cfca4: e59d7070 ldr r7, [sp, #112] ; 0x70 380cfca8: e1a08120 lsr r8, r0, #2 380cfcac: e1a091a1 lsr r9, r1, #3 380cfcb0: e1a0a122 lsr sl, r2, #2 After enable thumb: .syntax unified .thumb or -Wa,-mthumb .Lhobot_i8_i32_gemm_nn_m4_n8_neon: 38001100: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 38001104: ed2d 8b10 vpush {d8-d15} 38001108: 9c19 ldr r4, [sp, #100] ; 0x64 3800110a: 9d1a ldr r5, [sp, #104] ; 0x68 3800110c: 9e1b ldr r6, [sp, #108] ; 0x6c 3800110e: 9f1c ldr r7, [sp, #112] ; 0x70 38001110: ea4f 0890 mov.w r8, r0, lsr #2 38001114: ea4f 09d1 mov.w r9, r1, lsr #3 38001118: ea4f 0a92 mov.w sl, r2, lsr #2 This commit will enable the thumb option of the assembly file by default, so that when compiling the assembly file, the machine code and the system will be in a consistent state. ---------------------------------------------------------------- https://gcc.gnu.org/onlinedocs/gcc-4.5.2/gcc/ARM-Options.html GCC Manual: -mthumb Generate code for the Thumb instruction set. The default is to use the 32-bit ARM instruction set. This option automatically enables either 16-bit Thumb-1 or mixed 16/32-bit Thumb-2 instructions based on the -mcpu=name and -march=name options. ** This option is not passed to the assembler. ** ** If you want to force assembler files to be interpreted as Thumb code, either add a `.thumb' directive to the source or pass the -mthumb option directly to the assembler by prefixing it with -Wa. ** Signed-off-by: chao an <anchao@xiaomi.com>
… pointer type
Change-Id: I8fbb506d104dd6a0c41c86ca977e28097694910b
Signed-off-by: chao.an anchao@xiaomi.com