Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Add initial support for discontiguous bit fields #10

Merged
merged 1 commit into from
Oct 20, 2023

Conversation

rauhul
Copy link
Collaborator

@rauhul rauhul commented Oct 19, 2023

Updates the bit field macros 'bits' argument to accept a list of bit ranges. The register macro uses this information to generate a bit field descriptor type conforming to either ContiguousBitField or DiscontiguousBitField. The public api for users remains unchanged.

This commit doesn't introduce any diagnostics for overlapping bit fields within a discontiguous bit fields. A future commit will include those diagnostics as well as additional diagnostics for overlapping bit fields across fields in a register.

In the future the implementation of bit field descriptors could be improved. At a high level we would introduce a BitField protocol with two requirements: least significant bit and most significant bit. We would then extend FixedWidthInteger with a subscript taking a variadic list of these fields. This change would allow us to remove the distinction between contiguous and discontiguous bit fields. In order to make this change we need variadic pack iteration to land and we need to be able to use variadic packs without using runtime metadata.

Updates the bit field macros 'bits' argument to accept a list of bit
ranges. The register macro uses this information to generate a bit field
descriptor type conforming to either ContiguousBitField or
DiscontiguousBitField. The public api for users remains unchanged.

This commit doesn't introduce any diagnostics for overlapping bit fields
within a discontiguous bit fields. A future commit will include those
diagnostics as well as additional diagnostics for overlapping bit fields
across fields in a register.

In the future the implementation of bit field descriptors could be
improved. At a high level we would introduce a BitField protocol with
two requirements: least significant bit and most significant bit. We
would then extend FixedWidthInteger with a subscript taking a variadic
list of these fields. This change would allow us to remove the
distinction between contiguous and discontiguous bit fields. In order to
make this change we need variadic pack iteration to land and we need to
be able to use variadic packs without using runtime metadata.
@rauhul rauhul merged commit 9135c3b into main Oct 20, 2023
@rauhul rauhul deleted the dis-contiguous-bitfields branch October 20, 2023 16:27
rauhul added a commit that referenced this pull request Oct 26, 2023
Adds a missing change from 'Add initial support for discontiguous bit
fields (#10)' which makes the 'bits' argument to the various bit field
macros variadic.
rauhul added a commit that referenced this pull request Oct 26, 2023
Adds a missing change from 'Add initial support for discontiguous bit
fields (#10)' which makes the 'bits' argument to the various bit field
macros variadic.
rauhul added a commit that referenced this pull request Nov 17, 2023
Updates the bit field macros 'bits' argument to accept a list of bit
ranges. The register macro uses this information to generate a bit field
descriptor type conforming to either ContiguousBitField or
DiscontiguousBitField. The public api for users remains unchanged.

This commit doesn't introduce any diagnostics for overlapping bit fields
within a discontiguous bit fields. A future commit will include those
diagnostics as well as additional diagnostics for overlapping bit fields
across fields in a register.

In the future the implementation of bit field descriptors could be
improved. At a high level we would introduce a BitField protocol with
two requirements: least significant bit and most significant bit. We
would then extend FixedWidthInteger with a subscript taking a variadic
list of these fields. This change would allow us to remove the
distinction between contiguous and discontiguous bit fields. In order to
make this change we need variadic pack iteration to land and we need to
be able to use variadic packs without using runtime metadata.
rauhul added a commit that referenced this pull request Nov 17, 2023
Adds a missing change from 'Add initial support for discontiguous bit
fields (#10)' which makes the 'bits' argument to the various bit field
macros variadic.
rauhul added a commit that referenced this pull request Nov 17, 2023
Updates the bit field macros 'bits' argument to accept a list of bit
ranges. The register macro uses this information to generate a bit field
descriptor type conforming to either ContiguousBitField or
DiscontiguousBitField. The public api for users remains unchanged.

This commit doesn't introduce any diagnostics for overlapping bit fields
within a discontiguous bit fields. A future commit will include those
diagnostics as well as additional diagnostics for overlapping bit fields
across fields in a register.

In the future the implementation of bit field descriptors could be
improved. At a high level we would introduce a BitField protocol with
two requirements: least significant bit and most significant bit. We
would then extend FixedWidthInteger with a subscript taking a variadic
list of these fields. This change would allow us to remove the
distinction between contiguous and discontiguous bit fields. In order to
make this change we need variadic pack iteration to land and we need to
be able to use variadic packs without using runtime metadata.
rauhul added a commit that referenced this pull request Nov 17, 2023
Adds a missing change from 'Add initial support for discontiguous bit
fields (#10)' which makes the 'bits' argument to the various bit field
macros variadic.
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

Successfully merging this pull request may close these issues.

1 participant