32 bit processor implemented using Verilog
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README.md

README.md

32 bit Processor

32 bit processor implemented using Verilog

Location of ISE file

./Processor/src/Processor.ise

Test Bench Used

./testprocessor.v

Version of ISE Used

v10.1

Instruction to use:

  1. Open the project ISE file.
  2. Go to post route simulation.
  3. Simulate Post Place and Route Model.
  4. Calculate GCDs.
  5. Enjoy!

Contributors