True random number generator for use in an FPGA based on "A Highly Flexible Lightweight and High Speed True Random Number Generator on FPGA" by Faqiang Mei.
Generic n_order_g specifies the number of interleaved ring oscillators used (n_osc = n_order_g*3+1). The module output is tested to pass NIST SP800-22 and dieharder tests (few "weak") on an Xilinx Artix-7/Zynq-7000 at 125 Mbit/s with n_order_g=4.