Tiny PLL Tapeout

Super short and sweet tapeout. Two key blocks in here:

1. PLL "Controller" (really just phase and frequency detector)
2. Divider (/1 to /128, pow by 2)

Planning on implementing the rest on a breadboard!

Pinout

INPUT

• b0:
• b1: Reference Clock In
• b2:
• b3: Divider Select[0]
• b4: Divider Select[1]
• b5: Divider Select[2]
• b6: Feedback Clock In
• b7:

OUTPUT

• b0
• b1: PLL "Up" Signal
• b2: PLL "Down" Signal
• b3: PLL Reset (for debug only)
• b4
• b5: Feedback Clock Out
• b6
• b7

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Cloned README Below

Go to https://tinytapeout.com for instructions!

How to change the Wokwi project

Edit the Makefile and change the WOKWI_PROJECT_ID to match your project.

What is this about?

This repo is a template you can make a copy of for your own ASIC design using Wokwi.

When you edit the Makefile to choose a different ID, the GitHub Action will fetch the digital netlist of your design from Wokwi.

The design gets wrapped in some extra logic that builds a 'scan chain'. This is a way to put lots of designs onto one chip and still have access to them all. You can see all of the technical details here.

After that, the action uses the open source ASIC tool called OpenLane to build the files needed to fabricate an ASIC.

What files get made?

When the action is complete, you can click here to see the latest build of your design. You need to download the zip file and take a look at the contents:

• gds_render.svg - picture of your ASIC design
• gds.html - zoomable picture of your ASIC design
• runs/wokwi/reports/final_summary_report.csv - CSV file with lots of details about the design
• runs/wokwi/reports/synthesis/1-synthesis.stat.rpt.strategy4 - list of the standard cells used by your design
• runs/wokwi/results/final/gds/user_module.gds - the final GDS file needed to make your design

What next?

• Share your GDS on twitter, tag it #tinytapeout and link me!
• Submit it to be made
• Join the community