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Chisel v6.0.0 compile works, test fails #3746
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It seems chiseltest is not supported anymore and svsim should be used. |
This is a binary compatibility issue, please see Chisel's versioning policy: https://www.chisel-lang.org/docs/appendix/versioning Basically, binary compatibility breaks between major versions, so ChiselTest compiled for Chisel 5.x will not work with Chisel 6.x. Kevin has indicated intent to release ChiselTest for Chisel 6: ucb-bar/chiseltest#699. |
chiseltest sbt publishLocal needs the following patch:
firrtl2 needs the following patch:
After that my project fails with:
From my point of view this issue is far from completed.
As for now I'm staying at 5.1.0, and I hope you consider not breaking external projects in the future. |
Love your comment's wishlist number 1 in particular, @gonsolo.... Releasing Chisel 6 without having any structured means by which to perform assurance is gonzo. CC @schoeberl (Hi Martin!) |
Hi Joseph (@kiniry), what is your interest in Chisel? |
Hi all. Sorry about the breakages with ChiselTest. ChiselTest, from the perspective of the Chisel developers, was not intended to be used beyond Chisel 3.6. ChiselSim was built as a lightweight, maintained replacement in Chisel 5. Please migrate to ChiselSim. More information about the background of this issue and a migration guide is now provided here: http://www.chisel-lang.org/docs/appendix/migrating-from-chiseltest. If there are features you want/need with ChiselSim (e.g., The |
Hey @schoeberl! Remember me from DTU? We hardly got to talk while I was working there for a year before joining Galois ten years (!) ago. We have used Chisel at Galois on several Government-funded R&D projects I have run for the past eight years or so, including taping out several interesting ASICs. E.g., we were responsible for the six SoCs (plus OSs, development toolchains, improvements to clang to support RISC-V, and much more) provided by the Government to DARPA SSITH performers, and we simulated those SoCs in AWS for DARPA FETT, for which we built the entire infrastructure. We are currently using Chisel on the [DARPA AISS[(https://www.darpa.mil/program/automatic-implementation-of-secure-silicon) program, as we are developing a product line of hardware security engines. Thus, I need to be able to automatically generate model-based test benches and verification benches from our RDE (formally-grounded) designs/models. While we can go from RDE models to SVA-based benches (or, yuck, UVM), I'd rather push toward stronger integration of Chisel-centric assurance in this project, thus my nudge on this issue. |
Testing Chisel v6.0.0 with my small project resulted in the following error messages. Any ideas?
Version 5.1.0 works fine. I'm using chiseltest 5.0.2.
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