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'PSR' reports 'disabled' with i915.enable_psr=1 set as boot option. #2890

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morialo3 opened this issue May 7, 2023 · 2 comments
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@morialo3
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morialo3 commented May 7, 2023

'PSR' is a good power conservative option and I always set it on every kernel I have, from what I know it's suppose to be enabled by default, but anyway I added i915.enable_psr=1 to my boot options , and when I check it:

 cat /sys/kernel/debug/dri/0/i915_edp_psr_status   
Sink support: yes [0x01]
PSR mode: disabled
PSR sink not reliable: no

I don't know if it's a bug or disabled by default, any light on this would be helpful.
Some information about my system:

CPU
Architecture:                    x86_64
CPU op-mode(s):                  32-bit, 64-bit
Address sizes:                   39 bits physical, 48 bits virtual
Byte Order:                      Little Endian
CPU(s):                          16
On-line CPU(s) list:             0-15
Vendor ID:                       GenuineIntel
Model name:                      Intel(R) Core(TM) i7-10870H CPU @ 2.20GHz
CPU family:                      6
Model:                           165
Thread(s) per core:              2
Core(s) per socket:              8
Socket(s):                       1
Stepping:                        2
CPU(s) scaling MHz:              83%
CPU max MHz:                     5000.0000
CPU min MHz:                     800.0000
BogoMIPS:                        14666.64
Flags:                           fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc cpuid aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch cpuid_fault epb invpcid_single ssbd ibrs ibpb stibp ibrs_enhanced tpr_shadow vnmi flexpriority ept vpid ept_ad fsgsbase tsc_adjust bmi1 avx2 smep bmi2 erms invpcid mpx rdseed adx smap clflushopt intel_pt xsaveopt xsavec xgetbv1 xsaves dtherm ida arat pln pts hwp hwp_notify hwp_act_window hwp_epp pku ospke md_clear flush_l1d arch_capabilities
Virtualization:                  VT-x
L1d cache:                       256 KiB (8 instances)
L1i cache:                       256 KiB (8 instances)
L2 cache:                        2 MiB (8 instances)
L3 cache:                        16 MiB (1 instance)
NUMA node(s):                    1
NUMA node0 CPU(s):               0-15
Vulnerability Itlb multihit:     KVM: Mitigation: VMX disabled
Vulnerability L1tf:              Not affected
Vulnerability Mds:               Not affected
Vulnerability Meltdown:          Not affected
Vulnerability Mmio stale data:   Vulnerable
Vulnerability Retbleed:          Vulnerable
Vulnerability Spec store bypass: Vulnerable
Vulnerability Spectre v1:        Vulnerable: __user pointer sanitization and usercopy barriers only; no swapgs barriers
Vulnerability Spectre v2:        Vulnerable, IBPB: disabled, STIBP: disabled, PBRSB-eIBRS: Vulnerable
Vulnerability Srbds:             Vulnerable: No microcode
Vulnerability Tsx async abort:   Not affected
Kernel
uname -a
Linux amro-aorus17gyc 6.3.1-1-clear #1 SMP Sun, 07 May 2023 10:17:43 +0000 x86_64 GNU/Linux
@morialo3 morialo3 changed the title 'PSR' reports 'disable' with i915.enable_psr=1 set as boot option. 'PSR' reports 'disabled' with i915.enable_psr=1 set as boot option. May 7, 2023
@fenrus75
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fenrus75 commented May 7, 2023 via email

@morialo3
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Closing, Wayland issue, I didn't know back then.

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