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  1. Verilog-CPU Verilog-CPU Public

    In this project, simple CPU are implemented in verilog. To be specific, project 5 is for single cycle CPU, project 6 is for pipeline CPU.

    Verilog 1

  2. Operating-System Operating-System Public

    This is the projects for Operating System

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  3. Text-Detection-and-Translation-System Text-Detection-and-Translation-System Public

    In this project, the text will be detected from the images, then it will be translated into targeted language, here, we make it Chinese.

    Makefile

  4. Sheng-Huang_resume Sheng-Huang_resume Public

  5. third_party third_party Public

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  6. p8n p8n Public

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