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Schematics #1

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SM7I opened this issue Jan 28, 2022 · 3 comments
Open

Schematics #1

SM7I opened this issue Jan 28, 2022 · 3 comments

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@SM7I
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SM7I commented Jan 28, 2022

Lacking the schematics. Could you please upload that ?

@dkm1978 dkm1978 closed this as completed Aug 14, 2024
@SM7I
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SM7I commented Aug 14, 2024 via email

@dkm1978
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dkm1978 commented Aug 14, 2024

The scheme is Very Simple.
just look at the program code.

#define cs_pin PB11

#define A0_pin PB12
#define A1_pin PB13
#define A2_pin PB14
#define A3_pin PB15
#define A4_pin PA8

#define D0_pin PB9
#define D1_pin PB8
#define D2_pin PB7
#define D3_pin PB6
#define D4_pin PB4
#define D5_pin PB3
#define D6_pin PA15
#define D7_pin PA10

Sid address pins described as A0..A4
same data bus SID data
d0..d7
remaining pins should be connected as in original C64

in prototype I used a replacement sid circuit in fear of damaging it. so I didn't have to generate a clock signal for sid.

@dkm1978 dkm1978 reopened this Aug 14, 2024
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dkm1978 commented Aug 14, 2024

due to the current prices of SID 6581/8580 chips, I abandoned the hardware versions in favor of the reSID library

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