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Embench 0.5rc1 #42
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Embench 0.5rc1 #42
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We are now starting to capture significant amounts of benchmark data, which has shown improvements needed in the scripting. It has become clear that the chip config directory needs much less in it, with variations provided via the commmand line. Thus there is now a single generic 32-bit RISC-V chip configuration. Missing emulation functions are provided for the dummy libgcc library. We collect output as JSON files, so options to support this are provided in the benchmarking scripts. Finally a script (run_all.py) is provided to perform many benchmarking runs. This is work in progress. More changes are expected as we run a wider range of benchmarks. Files changed: * benchmark_size.py (build_parser): Add options for JSON output. (validate_args): Capture JSON argument value. (collect_data): Optionally generate JSON output. (main): Pass extra parameters to embench_stats, needed for it to optionally generate JSON output. * benchmark_speed.py (get_common_args): Add options for JSON output. (validate_args): Capture JSON argument value. (benchmark_speed): Increase timeout to 180 seconds; make the timeout output easier to use. (collect_data): Optionally generate JSON output. (main): Pass extra parameters to embench_stats, needed for it to optionally generate JSON output. * build_all.py (populate_user_flags, populate_user_patterns) (populate_user_libs): Don't inintialize conf, which makes it local - this was a bug. * config/riscv32/chips/generic/chip.cfg: Moved from size-test-gcc directory and greatly simplified, to just flags which are always needed. * config/riscv32/chips/generic/hipsupport.c: Moved from size-test-gcc directory. * config/riscv32/chips/generic/chipsupport.h: Likewise. * config/riscv32/chips/size-test-gcc/chip.cfg: Moved to generic directory. * config/riscv32/chips/size-test-gcc/chipsupport.c: Likewise. * config/riscv32/chips/size-test-gcc/chipsupport.h: Likewise. * config/riscv32/chips/size-test-llvm/chip.cfg: Deleted. * config/riscv32/chips/size-test-llvm/chipsupport.c: Deleted. * config/riscv32/chips/size-test-llvm/chipsupport.h: Deleted. * config/riscv32/chips/speed-test/chip.cfg: Deleted. * config/riscv32/chips/speed-test/chipsupport.c: Deleted. * config/riscv32/chips/speed-test/chipsupport.h: Deleted. * pylib/embench_core.py (output_stats): Add extra arguments to facilitate generation of JSON output; generate JSON output if specified. (embench_stats): Add extra arguments to facilitate generation of JSON output. * run_all.py: Created. * support/dummy-libgcc.c (__modsi3, __muldi3, __umodsi3): Created.
Configuration now more general and Arm, ARC and AVR added. Files changed: * benchmark_size.py (build_parser): Make JSON final comma optional. (main): Pass optional comma to stats program. * benchmark_speed.py (get_common_args): Make JSON final comma optional. (main): Pass optional comma to stats program. * build_all.py (compile_file, compile_support) (create_link_binlist): Generalize to build any source code in config directories. * config/arc/arc-millicode.S: Created. * config/arc/arch.cfg: Created. * config/arc/boards/generic/board.cfg: Created. * config/arc/boards/generic/boardsupport.c: Created. * config/arc/boards/generic/boardsupport.h: Created. * config/arc/chips/em/chip.cfg: Created. * config/arc/chips/em/chipsupport.c: Created. * config/arc/chips/em/chipsupport.h: Created. * config/arm/arch.cfg: Created. * config/arm/boards/generic/board.cfg: Created. * config/arm/boards/generic/boardsupport.c: Created. * config/arm/boards/generic/boardsupport.h: Created. * config/arm/chips/cortex-m4/chip.cfg: Created. * config/arm/chips/cortex-m4/chipsupport.c: Created. * config/arm/chips/cortex-m4/chipsupport.h: Created. * config/avr/arch.cfg: Created. * config/avr/boards/generic/board.cfg: Created. * config/avr/boards/generic/boardsupport.c: Created. * config/avr/boards/generic/boardsupport.h: Created. * config/avr/chips/atmega64/chip.cfg: Created. * config/avr/chips/atmega64/chipsupport.c: Created. * config/avr/chips/atmega64/chipsupport.h: Created. * config/default.exp: Deleted. * run_all.py: Add JSON comma argument, and add more runset entries to allow for variation across architectures; add more runsets. (build_parser): Add more options for runsets. (arglist_to_str): Created. (build_benchmarks): Generalize for more variation and allow PATH to be specified. (benchmark): Cleaner error messages (main): Add support for more runsets. * support/dummy-crt0.c (__init): Created. * support/dummy-libc.c (sprintf, putchar, fopen, fflush, fgetc) (getc, fputc, putc, memchr, isspace, isxdigit, tolower): Created. * support/dummy-libgcc.c (__riscv_restore_12, __adddi3) (__adddi3_s8, __ashldi3, __ashrdi3, __bswapsi2, __cmpdi2) (__cmpdi2_s8, __divmodhi4, __divmodsi4, __lshrdi3, __mulshisi3) (__negdi2, __subdi3, __tablejump2__, __udivmodhi4, __udivmodsi4) (__usmulhisi3, __umulhisi3): Created.
Add --verbose option, better reporting of commands and llvm option to run-all script. Files changed: * build_all.py: Import arglist_to_str from embench_core. (build_parser): Add --verbose option. (compile_file, link_benchmark): Record command in log file if --verbose specified. All reporting of arglist using arglist_to_str. (main): Set verbose global parameter. * pylib/embench_core.py (arglist_to_str): Created. * run_all.py (rv32_gcc_opt_runset): Add LTO variants and paths for tool chains. (rv32_llvm_opt_runset): New dictionary created. (build_parser): Add --rv32-llvm-opt option. (build_benchmarks): Specify verbose option to build_all.py (main): Handle --rv32-llvm-opt option.
Get rid of some default arguments, add the --env option. Add tests of RV32E and RV32EC Files changed: 2019-12-12 Jeremy Bennett <jeremy.bennett@embecosm.com> * build_all.py (build_parser): Remove all type=str arguments, since these are default; add --env option; clarify some help strings. (validate_args): Set up the environment argument. (set_environ): Created. (main): Call set_environ * run_all.py (rv32_gcc_opt_runset): Add environment spec entries for LTO runs (rv32_gcc_isa_runset): Add RV32E and RV32EC cases. (build_benchmarks): Add environment argument.
Add startup file, linker script, speed test, and python module for size and performance benchmarks on the stm32f4-discovery board in default regime (16MHz). Fix parsing of ri5cy cycle count in the speed benchmark. Files changed or added: * config/arm/boards/stm32f4-discovery/STM32F407XG.ld: stm32f4 linker script. * config/arm/boards/stm32f4-discovery/board.cfg: stm32f4 file for hard coding specific cflags and ldflags. * config/arm/boards/stm32f4-discovery/boardsupport.c: stm32f4 file for support functions. * config/arm/boards/stm32f4-discovery/boardsupport.h: stm32f4 support header. * config/arm/boards/stm32f4-discovery/startup_stm32f407xx.S: stm32f4 startup file. * config/arm/chips/cortex-m4/chip.cfg: remove -fdata-sections as affects performance due to the presence of -fsection-anchors as an ARM default flag. * pylib/run_stm32f4-discovery.py: add python module for the speed test of stm32f4-discovery. * pylib/run_gdbserver_sim.py: fix parsing of the cycle count. * src/matmult-int/matmult-int.c: reset LOCAL_SCALE_FACTOR. * src/picojpeg/picojpeg_test.c: Likewise. * src/edn/libedn.c: Likewise. * src/ud/libud.c: Likewise. * src/st/libst.c: Likewise. * src/slre/libslre.c: Likewise. * src/qrduino/qrtest.c: Likewise. * src/sglib-combined/combined.c: Likewise. * src/nettle-aes/nettle-aes.c: Likewise. * src/aha-mont64/mont64.c: Likewise. * src/huffbench/libhuffbench.c: Likewise. * src/nbody/nbody.c: Likewise. * src/wikisort/libwikisort.c: Likewise. * src/cubic/basicmath_small.c: Likewise. * src/crc32/crc_32.c: Likewise. * src/nettle-sha256/nettle-sha256.c: Likewise. * src/nsichneu/libnsichneu.c: Likewise. * src/statemate/libstatemate.c: Likewise. * src/minver/libminver.c: Likewise.
Thank you - great to have Arm Cortex M4 support |
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