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Came back to this issue as I was interested in other OpenHwGroup cores.
There are several errors related to a uvm_error directive during Verilator model compilation. For instance :
$ litex_sim --cpu-type=cv32e40s
134 | `uvm_error("Alignment buffer SVA",
| ^~~~~~~~~~
/opt/litex_install/pythondata-cpu-cv32e40s/pythondata_cpu_cv32e40s/system_verilog/bhv/cv32e40s_wrapper.sv:17:1: ... note: In file included from 'cv32e40s_wrapper.sv'
%Error: /opt/litex_install/pythondata-cpu-cv32e40s/pythondata_cpu_cv32e40s/system_verilog/sva/cv32e40s_alignment_buffer_sva.sv:146:9: Define or directive not defined: '`uvm_error'
: ... Suggested alternative: '`error'
I'll try to solve it later this week. At least, for an initial support (without testing 40S specific modules).
Hello to all,
I am trying to implement the cv32e40s in Litex.
The Litex hub "pythondata-cpu-cv32e40s" has already been done last year:
https://github.com/litex-hub/pythondata-cpu-cv32e40s
I followed this little guide to try to do it manually based on the cv32e40p and cv32e41p:
http://pcotret.gitlab.io/blog/processor_in_litex/
But shouldn't it already appear in the list just by installing Litex without anything else?
Because the cv32e40p and cv32e41p are present.
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