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fix(i2c_master): Do not busy wait on sync transactions (IDFGH-12280) #13322

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@KJ7LNW KJ7LNW commented Mar 6, 2024

This commit introduces a private member i2c_master_bus_t::in_progress_semphr which allows i2c_master_transmit and related functions to give up their timeslice so other tasks can proceed.

Without this commit, one must delay at least one tick via vTaskDelay(1) to prevent trigging the idle watchdog, thus limiting the maximum I2C transaction rate to about the speed of CONFIG_FREERTOS_HZ.

With this commit, over 6600 samples/sec are possible and the tick delay is unnecessary.

CPU usage below was measured using vTaskGetRunTimeStats(). The FreeRTOS %CPU numbers seem to increase over time and level out after a time, so CPU usage was sampled after 5 seconds across each test for consistency across measurements. Measurements were taken with CONFIG_FREERTOS_HZ set to 100Hz and 1000Hz:

Before:

  • 100Hz: samples/sec= 99 with 1% CPU ( 99.0 samples/%cpu)
  • 1000Hz: samples/sec= 995 with 10% CPU ( 99.5 samples/%cpu)

After:

  • 100Hz: samples/sec=6637 with 23% CPU (288.6 samples/%cpu)
  • 1000Hz: samples/sec=6610 with 24% CPU (275.4 samples/%cpu)

Closes: #13137

This commit introduces a private member `i2c_master_bus_t::in_progress_semphr`
which allows `i2c_master_transmit` and related functions to give up their
timeslice so other tasks can proceed.

Without this commit, one must delay at least one tick via `vTaskDelay(1)` to
prevent trigging the idle watchdog, thus limiting the maximum I2C transaction
rate to about the speed of `CONFIG_FREERTOS_HZ`.

With this commit, over 6600 samples/sec are possible and the tick delay is
unnecessary.

CPU usage below was measured using `vTaskGetRunTimeStats()`.  The FreeRTOS %CPU
numbers seem to increase over time and level out after a time, so CPU usage was
sampled after 5 seconds across each test for consistency across measurements.
Measurements were taken with `CONFIG_FREERTOS_HZ` set to 100Hz and 1000Hz:

Before:
	 100Hz: samples/sec=  99 with  1% CPU ( 99.0 samples/%cpu)
	1000Hz: samples/sec= 995 with 10% CPU ( 99.5 samples/%cpu)

After:
	 100Hz: samples/sec=6637 with 23% CPU (288.6 samples/%cpu)
	1000Hz: samples/sec=6610 with 24% CPU (275.4 samples/%cpu)

Closes: espressif#13137

Signed-off-by: Eric Wheeler <esp-idf@z.ewheeler.org>
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@espressif-bot espressif-bot added the Status: Opened Issue is new label Mar 6, 2024
@github-actions github-actions bot changed the title fix(i2c_master): Do not busy wait on sync transactions fix(i2c_master): Do not busy wait on sync transactions (IDFGH-12280) Mar 6, 2024
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KJ7LNW commented Mar 6, 2024

We used this simple project to test the PR change:

If you try the test project, be sure to comment the vTaskDelay(1) line here, or the samples/sec rate will be limited by your CONFIG_FREERTOS_HZ rate:

https://github.com/KJ7LNW/esp32-i2c-test/blob/master/main/i2c-test.c#L152

@KJ7LNW KJ7LNW force-pushed the i2c_master-sync-semaphore branch from 65af55e to bf62c8a Compare March 6, 2024 21:46
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KJ7LNW commented Mar 6, 2024

The force-push is a minor change: It simply sets HPTaskAwoken to true when i2c_master->trans_done == true to wake the caller sooner.

This reduces latency and increases the i2c sample rates to 6612 (1000Hz) and 6648 (100Hz).

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nebkat commented Mar 7, 2024

I think the original commit was better. If I2C is running on a medium priority task and the interrupt happens on a high priority task, we shouldn't yield it just to complete the I2C transaction - we must respect the priorities chosen. Especially not for a ~0.2% increase in performance.

@KJ7LNW KJ7LNW force-pushed the i2c_master-sync-semaphore branch from bf62c8a to 65af55e Compare March 8, 2024 01:03
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KJ7LNW commented Mar 8, 2024

@nebkat that makes sense. Reverted and force-pushed.

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Thanks a lot for this contribution. I am going to create an event queue instead of semaphore. Which can be used to store more information.

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jrahlf commented Mar 8, 2024

@nebkat that does not make sense to me.
Interrupts do not run on any task, they interrupt tasks. If the I2C ISR yields at the end, the scheduler runs at the end of the ISR, instead of at the end of the current time slice. Of course FreeRTOS respects the priorities of the tasks here.

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nebkat commented Mar 8, 2024

@jrahlf You're right my explanation was inaccurate, it would jump back to the higher priority task anyway. But we would have run the scheduler unnecessarily, so still better this way.

I have also learned pxHigherPriorityTaskWoken will only ever be set to true (it is or-ing), so there is no need for the HPTaskAwokenInProgress here

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KJ7LNW commented Mar 8, 2024

Out of curiosity I wondered how task notifications perform, which FreeRTOS claims to be up to 45% faster than semaphores:

Notifications:

  • 100Hz: samples/sec= 6654 with 18% CPU (efficiency: 369.7 samples/%cpu)
  • 1000Hz: samples/sec= 6636 with 18% CPU (efficiency: 368.7 samples/%cpu)

Semaphores: (copied from above)

  • 100Hz: samples/sec=6637 with 23% CPU (efficiency: 288.6 samples/%cpu)
  • 1000Hz: samples/sec=6610 with 24% CPU (efficiency: 275.4 samples/%cpu)

As you can see, notifications are faster and CPU efficiency is much higher with the task notification implementation.

I've pushed a commit converting to notifications on this PR so you can see the difference.

The previous commit uses semaphores, this commit converts semaphores to task
notifications because FreeRTOS claims they are faster, and indeed they are:

Notifications (this commit):
-  100Hz: samples/sec= 6654 with 18% CPU (efficiency: 369.7  samples/%cpu)
- 1000Hz: samples/sec= 6636 with 18% CPU (efficiency: 368.7 samples/%cpu)

Semaphores (previous commit):
-  100Hz: samples/sec= 6637 with 23% CPU (efficiency: 288.6 samples/%cpu)
- 1000Hz: samples/sec= 6610 with 24% CPU (efficiency: 275.4 samples/%cpu)

Signed-off-by: Eric Wheeler <esp-idf@z.ewheeler.org>
@KJ7LNW KJ7LNW force-pushed the i2c_master-sync-semaphore branch from d5e513c to d132c79 Compare March 9, 2024 00:37
nebkat pushed a commit to nebkat/esp-idf that referenced this pull request Apr 9, 2024
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i2c: busy wait in s_i2c_send_commands is not very power efficient. (IDFGH-12076)
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