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Migrate UART to use DMA and UART IDLE interrupt #38
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86% CPU for a modulator? We should just use a faster CPU Sent from my Windows Phone De la: Pavel Krupetsmailto:notifications@github.com AFSK modulator on release build loads CPU for 86%. I don't want UART to interrupt AFSK message generation nor I want GPS coordinates to be lost from UART. Proposed solution:
this will remove code from interrupts and CPU will be free to handle AFSK modulation. You are receiving this because you are subscribed to this thread. |
I want this to work on a slowest CPU possible so code can be ported to circumnavigating balloon. I did this test: |
By 86% I mean CPU was running at full speed and consumed 86% of available time to fill DMA buffer. |
Also DMA for UART will save us from getting to many interrupts which is good as well. I wasn't sure how to detect when UART finished transmitting but DMA buffer isn't full. After reading specs it seems UART IDLE interrupt will be fired in this case and I can copy memory from DMA buffer to ring buffer for later processing. So instead of handling interrupt for each symbol I will have 2 interrupts: UART IDLE, DMA BUFFER FULL |
I see. How long is the duty cycle for this computation? Maybe it's not a problem if it's very small. Adi Date: Thu, 2 Jun 2016 10:10:53 -0700 I want this to work on a slowest CPU possible so code can be ported to circumnavigating balloon. I did this test: do (a * b + c / d) and write to RAM on 16MHz at 96kHz and it loaded CPU 30%. Adding read from program memory increased it to 50% so I don't think I can optimize much. Division might be slowest operation. — |
We aren't using M4. AFSK modulation works so I don't see a problem. Changing to use DMA for UART also isn't a big deal. |
optimizations for shifts and * will be done at the end when we know signal generation frequency, CPU frequency, etc. For now it's enough that it works on target CPU. |
The division is the killer here. Can you make it a shift? Shifts are usually free. |
Yeh. After I make sure precision for each operation is optimized I will replace divisions by shifts / muls. n / 1'000'000 for instance will be replaced (if it stays) with ((n >> 6) * 67) >> 20). This improves duty cycle from 86% to 40%. I am still able to receive message from short distance with this change but need to test longer distances though. |
Main thing is that even without this speedup code works so we can make PCB for final testing, as testing long distance with breadboard is not very clever. |
we don't have enough DMA channels for this. Will have to live with interrupt. |
AFSK modulator on release build loads CPU for 86%. I don't want UART to interrupt AFSK message generation nor I want GPS coordinates to be lost from UART.
Proposed solution:
this will remove code from interrupts and CPU will be free to handle AFSK modulation.
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