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Ordering bug comparing Vec & Slice #215

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superfell opened this issue Jan 29, 2023 · 0 comments
Closed

Ordering bug comparing Vec & Slice #215

superfell opened this issue Jan 29, 2023 · 0 comments

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@superfell
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In the following test, the 2 asserts where there's a bitvec on the left and a slice on the right will fail.

    #[test]
    fn test_bitvec_order() {
        let k = bitvec![0, 1, 0, 1];
        let r = bitvec![1, 0, 0, 0];
        let k_slice = &k[..];
        let r_slice = &r[..];
        assert!(r > k);
        assert!(k < r);
        assert!(r_slice > k_slice);
        assert!(k_slice < r_slice);
        assert!(r_slice > k);
        assert!(k < r_slice);
        assert!(k_slice < r);
        assert!(r > k_slice);
    }

I believe this is due to the PartialOrd implementation at https://github.com/ferrilab/bitvec/blob/main/src/vec/traits.rs#L201 which swaps the order of self & other around.

myrrlyn added a commit that referenced this issue Apr 12, 2023
Fix BitVec to BitSlice partial_cmp. Fixes #215
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