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Implement remaining common MBCs #62

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mzal opened this issue Sep 8, 2020 · 0 comments · Fixed by #95
Open

Implement remaining common MBCs #62

mzal opened this issue Sep 8, 2020 · 0 comments · Fixed by #95
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@mzal

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@mzal
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mzal commented Sep 8, 2020

There are still some common Memory Bank Controllers which are not implemented in mem.

The ones which need to be supported are:

  • MBC5
  • MBC6
  • MBC7
  • HuC1
  • HuC5
@mzal mzal self-assigned this Sep 27, 2020
mzal pushed a commit that referenced this issue Oct 6, 2020
implement MBC5 emulation (#62)
4ebba59
mzal pushed a commit that referenced this issue Oct 11, 2020
implement MBC5 emulation (#62)
4266943 
+ add stub handling for speed switch

Right now we don't have any CPU clock synchronization implemented, yet some
programs are expecting CGB speed-switch support. Without any support for it in
place, the HALT instruction is read and program execution halts indefinetly.
This commit adds stub speed switch handling that unhalts the program execution
after speed switch is requested.

+ add read access to mem-handled IO registers
mzal pushed a commit that referenced this issue Oct 11, 2020
@mzal
implement MBC5 emulation (#62)
d7b9406 
+ add stub handling for speed switch

Right now we don't have any CPU clock synchronization implemented, yet some
programs are expecting CGB speed-switch support. Without any support for it in
place, the HALT instruction is read and program execution halts indefinetly.
This commit adds stub speed switch handling that unhalts the program execution
after speed switch is requested.

+ add read access to mem-handled IO registers
@galeblon galeblon linked a pull request Oct 13, 2020 that will close this issue
MBC5 emulation (#62) #95
Merged
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MBC5 emulation (#62) galeblon/GBC_Emulator
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