Skip to content

Commit 5e1dc02

Browse files
committed
Preliminary work to interface with rust
1 parent 2168f92 commit 5e1dc02

File tree

5 files changed

+94
-66
lines changed

5 files changed

+94
-66
lines changed

src/errorout-console.adb

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -130,6 +130,12 @@ package body Errorout.Console is
130130
Program_Name := new String'(Name);
131131
end Set_Program_Name;
132132

133+
procedure Set_Program_Name_With_Len
134+
(Str : Thin_String_Ptr; Len : Natural) is
135+
begin
136+
Program_Name := new String'(Str (1 .. Len));
137+
end Set_Program_Name_With_Len;
138+
133139
procedure Disp_Program_Name is
134140
begin
135141
if Program_Name /= null then

src/errorout-console.ads

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -19,6 +19,9 @@ package Errorout.Console is
1919
-- if not initialized.
2020
procedure Set_Program_Name (Name : String);
2121

22+
-- Likewise, but for non-Ada.
23+
procedure Set_Program_Name_With_Len (Str : Thin_String_Ptr; Len : Natural);
24+
2225
-- Report handle for the console.
2326
procedure Console_Error_Start (E : Error_Record);
2427
procedure Console_Message (Str : String);

src/ghdldrv/ghdlcomp.adb

Lines changed: 75 additions & 66 deletions
Original file line numberDiff line numberDiff line change
@@ -329,10 +329,12 @@ package body Ghdlcomp is
329329
procedure Common_Compile_Init (Analyze_Only : Boolean) is
330330
begin
331331
if Analyze_Only then
332+
-- Initialize library path and load std+work libraries.
332333
if not Setup_Libraries (True) then
333334
raise Option_Error;
334335
end if;
335336
else
337+
-- Initialize library path and load std library.
336338
if not Setup_Libraries (False)
337339
or else not Libraries.Load_Std_Library
338340
then
@@ -487,99 +489,107 @@ package body Ghdlcomp is
487489
& ASCII.LF & " aliases: -a, analyse";
488490
end Get_Short_Help;
489491

490-
procedure Perform_Action (Cmd : in out Command_Analyze;
491-
Args : String_Acc_Array;
492-
Success : out Boolean)
492+
function Analyze_File (Id : Name_Id) return Boolean
493493
is
494-
pragma Unreferenced (Cmd);
495-
Id : Name_Id;
496494
Design_File : Iir_Design_File;
497495
New_Design_File : Iir_Design_File;
498496
Unit : Iir;
499497
Next_Unit : Iir;
500498
begin
501-
Success := False;
499+
-- Parse file.
500+
Design_File := Load_File_Name (Id);
501+
if Errorout.Nbr_Errors > 0
502+
and then not Flags.Flag_Force_Analysis
503+
then
504+
return False;
505+
end if;
502506

503-
if Args'Length = 0 then
504-
Error ("no file to analyze");
505-
return;
507+
New_Design_File := Null_Iir;
508+
509+
if False then
510+
-- Speed up analysis: remove all previous designs.
511+
-- However, this is not in the LRM...
512+
Libraries.Purge_Design_File (Design_File);
506513
end if;
507514

508-
Expect_Filenames (Args);
515+
if Design_File /= Null_Iir then
516+
Unit := Get_First_Design_Unit (Design_File);
517+
while Unit /= Null_Iir loop
518+
-- Analyze unit.
519+
Finish_Compilation (Unit, True);
509520

510-
Hooks.Compile_Init.all (True);
521+
Next_Unit := Get_Chain (Unit);
511522

512-
-- Parse all files.
513-
for I in Args'Range loop
514-
Id := Name_Table.Get_Identifier (Args (I).all);
523+
if Errorout.Nbr_Errors = 0
524+
or else (Flags.Flag_Force_Analysis
525+
and then Get_Library_Unit (Unit) /= Null_Iir)
526+
then
527+
Set_Chain (Unit, Null_Iir);
528+
Libraries.Add_Design_Unit_Into_Library (Unit);
529+
New_Design_File := Get_Design_File (Unit);
530+
end if;
531+
532+
Unit := Next_Unit;
533+
end loop;
515534

516-
-- Parse file.
517-
Design_File := Load_File_Name (Id);
518535
if Errorout.Nbr_Errors > 0
519536
and then not Flags.Flag_Force_Analysis
520537
then
521-
Success := Flag_Expect_Failure;
522-
return;
538+
return False;
523539
end if;
524540

525-
New_Design_File := Null_Iir;
526-
527-
if False then
528-
-- Speed up analysis: remove all previous designs.
529-
-- However, this is not in the LRM...
530-
Libraries.Purge_Design_File (Design_File);
541+
if New_Design_File = Design_File then
542+
pragma Assert (Flags.Flag_Force_Analysis);
543+
null;
544+
else
545+
Free_Iir (Design_File);
531546
end if;
532547

533-
if Design_File /= Null_Iir then
534-
Unit := Get_First_Design_Unit (Design_File);
548+
-- Do late analysis checks.
549+
if New_Design_File /= Null_Iir then
550+
Unit := Get_First_Design_Unit (New_Design_File);
535551
while Unit /= Null_Iir loop
536-
-- Analyze unit.
537-
Finish_Compilation (Unit, True);
538-
539-
Next_Unit := Get_Chain (Unit);
540-
541-
if Errorout.Nbr_Errors = 0
542-
or else (Flags.Flag_Force_Analysis
543-
and then Get_Library_Unit (Unit) /= Null_Iir)
544-
then
545-
Set_Chain (Unit, Null_Iir);
546-
Libraries.Add_Design_Unit_Into_Library (Unit);
547-
New_Design_File := Get_Design_File (Unit);
548-
end if;
549-
550-
Unit := Next_Unit;
552+
Vhdl.Sem.Sem_Analysis_Checks_List
553+
(Unit, Is_Warning_Enabled (Warnid_Delayed_Checks));
554+
Unit := Get_Chain (Unit);
551555
end loop;
552556

553557
if Errorout.Nbr_Errors > 0
554558
and then not Flags.Flag_Force_Analysis
555559
then
556-
Success := Flag_Expect_Failure;
557-
return;
560+
return False;
558561
end if;
562+
end if;
563+
end if;
559564

560-
if New_Design_File = Design_File then
561-
pragma Assert (Flags.Flag_Force_Analysis);
562-
null;
563-
else
564-
Free_Iir (Design_File);
565-
end if;
565+
return True;
566+
end Analyze_File;
566567

567-
-- Do late analysis checks.
568-
if New_Design_File /= Null_Iir then
569-
Unit := Get_First_Design_Unit (New_Design_File);
570-
while Unit /= Null_Iir loop
571-
Vhdl.Sem.Sem_Analysis_Checks_List
572-
(Unit, Is_Warning_Enabled (Warnid_Delayed_Checks));
573-
Unit := Get_Chain (Unit);
574-
end loop;
575-
576-
if Errorout.Nbr_Errors > 0
577-
and then not Flags.Flag_Force_Analysis
578-
then
579-
Success := Flag_Expect_Failure;
580-
return;
581-
end if;
582-
end if;
568+
procedure Perform_Action (Cmd : in out Command_Analyze;
569+
Args : String_Acc_Array;
570+
Success : out Boolean)
571+
is
572+
pragma Unreferenced (Cmd);
573+
Id : Name_Id;
574+
begin
575+
Success := False;
576+
577+
if Args'Length = 0 then
578+
Error ("no file to analyze");
579+
return;
580+
end if;
581+
582+
Expect_Filenames (Args);
583+
584+
Hooks.Compile_Init.all (True);
585+
586+
-- Parse all files.
587+
for I in Args'Range loop
588+
Id := Name_Table.Get_Identifier (Args (I).all);
589+
590+
if not Analyze_File (Id) then
591+
Success := Flag_Expect_Failure;
592+
return;
583593
end if;
584594
end loop;
585595

@@ -588,7 +598,6 @@ package body Ghdlcomp is
588598
return;
589599
end if;
590600

591-
592601
if Flag_Expect_Failure then
593602
Success := False;
594603
return;

src/ghdldrv/ghdlcomp.ads

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -112,4 +112,9 @@ package Ghdlcomp is
112112

113113
-- Hook for verilog.
114114
Init_Verilog_Options : Compile_Init_Acc;
115+
116+
private
117+
-- For Rust:
118+
-- Analyze one file, return False on error.
119+
function Analyze_File (Id : Name_Id) return Boolean;
115120
end Ghdlcomp;

src/ghdldrv/ghdlrun.ads

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -15,4 +15,9 @@
1515
-- along with this program. If not, see <gnu.org/licenses>.
1616
package Ghdlrun is
1717
procedure Register_Commands;
18+
19+
private
20+
-- For Rust:
21+
-- To be called before any compilation.
22+
procedure Compile_Init (Analyze_Only : Boolean);
1823
end Ghdlrun;

0 commit comments

Comments
 (0)