SMM_BWP result hardcoded?

[johnloucaides]

It appears that the SMM_BWP will always show up as 0. The ich8 chipset definition hardcodes this to 0, and the others appear to inherit their definition of the BIOS Control Register without change.

pawn/chipset_intel_ich8.cc

Line 30 in 7c880f5

0, // Reserved, SMM_BWP on PCH platforms.

Checked with lspci and chipsec to confirm discrepancy.

[cblichmann]

Thanks, I'll look into it.

[cblichmann]

Can't verify right now though, as my kernel (4.9) does not allow me to mmap the root complex.
lspci note: sudo lspci -vv -xxxx -s 00:1f.0 dumps raw config for the LPC device, offset 0xDC contains BIOS_CNTL.

[johnloucaides]

Looks right. I got consistent results with lspci and chipsec on xeon e5 v2 (Ivy Town) at least. Thanks!