Use movi NEON instruction to zero out registers #203
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Currently
dupis used to zero our NEON registers in the packing and AArch64 kernel code. According to the Cortex A72 optimization guide which is used in the Raspberry PI 4,duphas an execution latency of 8 cycles and a throughput of 1 when copying from a general purpose register to a NEON register.This PR changes the code to use
moviwhich has a latency of 3 cycles and a throughput of 2. This is also used in LLVM for zeroing out registers, but please let me know if I am missing something here.I briefly benchmarked this code on a Pixel phone but didn't see any measurable difference which I think is expected since on the used A76 architecture
duponly has a latency of 3 cycles so this PR won't have a large effect anyway.