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Some primitives have incorrectly extracted parameters in spice files like width / length #192

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mithro opened this issue Oct 26, 2020 · 7 comments · Fixed by #193
Closed

Some primitives have incorrectly extracted parameters in spice files like width / length #192

mithro opened this issue Oct 26, 2020 · 7 comments · Fixed by #193
Labels
files-model-spice Issues related to Spice model files. lib-sky130_fd_pr Issues with the base primitive cells provided by the SkyWater foundry. type-bug Something isn't working

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@mithro
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mithro commented Oct 26, 2020

Current version;

.subckt sky130_fd_pr__npn_11v0_W1p00L1p00 B C E
X0 C E E SUBS sky130_fd_pr__nfet_20v0 w=3e+06u l=3.52e+06u
.ends

Should be;

.subckt sky130_fd_pr__npn_11v0_W1p00L1p00 B C E
X0 C E E SUBS sky130_fd_pr__nfet_20v0 w=5.95e+06u l=130000u
.ends

Example - https://cs.opensource.google/skywater-pdk/sky130_fd_pr/+/master:cells/npn_11v0/sky130_fd_pr__npn_11v0_W1p00L1p00.spice?q=sky130_fd_pr__npn_11v0_W1p00L1p00&ss=skywater-pdk%2Fsky130_fd_pr

Difference;

 .subckt sky130_fd_pr__npn_11v0_W1p00L1p00 B C E
-X0 C E E SUBS sky130_fd_pr__nfet_20v0 w=3e+06u l=3.52e+06u
+X0 C E E SUBS sky130_fd_pr__nfet_20v0 w=5.95e+06u l=130000u
 .ends

This has been fixed in magic but needs to be pushed to this repository.
@mithro mithro added type-bug Something isn't working files-model-spice Issues related to Spice model files. lib-sky130_fd_pr Issues with the base primitive cells provided by the SkyWater foundry. labels Oct 26, 2020
@mithro
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mithro commented Oct 26, 2020

FYI - @RTimothyEdwards

@mithro
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mithro commented Oct 26, 2020 •
edited
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Another example;

https://cs.opensource.google/skywater-pdk/sky130_fd_pr/+/master:cells/esd_rf_nfet_20v0_iec/sky130_fd_pr__esd_rf_nfet_20v0_iec_21vW60p00.spice?q=sky130_fd_pr__esd_rf_nfet_20v0_iec_21vW60p00&ss=skywater-pdk%2Fsky130_fd_pr

 * Top level circuit sky130_fd_pr__esd_rf_nfet_20v0_iec_21vW60p00
-X0 dw_n700_n714# SUBS SUBS SUBS sky130_fd_pr__nfet_20v0 w=3e+07u l=1.5e+06u
-X1 dw_n700_n714# SUBS SUBS SUBS sky130_fd_pr__nfet_20v0 w=3e+07u l=1.5e+06u
+X0 dw_n700_n714# SUBS SUBS SUBS sky130_fd_pr__nfet_20v0 w=1.5e+07u l=1.65e+07u
+X1 dw_n700_n714# SUBS SUBS SUBS sky130_fd_pr__nfet_20v0 w=1.5e+07u l=1.65e+07u
 .end

@mithro
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mithro commented Oct 26, 2020 •
edited
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https://cs.opensource.google/skywater-pdk/sky130_fd_pr/+/master:cells/npn_11v0/sky130_fd_pr__npn_11v0_W1p00L1p00.spice?q=sky130_fd_pr__npn_11v0_W1p00L1p00&ss=skywater-pdk%2Fsky130_fd_pr

 .subckt sky130_fd_pr__npn_11v0_W1p00L1p00 B C E
-X0 C E E SUBS sky130_fd_pr__nfet_20v0 w=5.95e+06u l=130000u
+X0 C E E SUBS sky130_fd_pr__nfet_20v0 w=3e+06u l=3.52e+06u
 .ends

@mithro
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mithro commented Oct 26, 2020 •
edited
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 * Top level circuit sky130_fd_pr__model__nfet_extendeddrain__example2
-X0 SUBS a_0_0# a_n56_26# dw_n144_n352# sky130_fd_pr__pfet_20v0 w=5e+06u l=920000u
+X0 SUBS a_0_0# a_n56_26# dw_n144_n352# sky130_fd_pr__pfet_20v0 w=2.5e+06u l=3.42e+06u
 .end

@mithro
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mithro commented Oct 26, 2020 •
edited
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https://cs.opensource.google/skywater-pdk/sky130_fd_pr/+/master:cells/rf_nfet_20v0_nvt_withptap/sky130_fd_pr__rf_nfet_20v0_nvt_withptap.spice?q=sky130_fd_pr__rf_nfet_20v0_nvt_withptap

 .subckt sky130_fd_pr__rf_nfet_20v0_nvt_withptap D G PSUB S
-X0 D G S PSUB sky130_fd_pr__nfet_20v0_nvt w=1.5e+07u l=1.65e+07u
-X1 D G S PSUB sky130_fd_pr__nfet_20v0_nvt w=1.5e+07u l=1.65e+07u
+X0 D G S PSUB sky130_fd_pr__nfet_20v0_nvt w=3e+07u l=1.5e+06u
+X1 D G S PSUB sky130_fd_pr__nfet_20v0_nvt w=3e+07u l=1.5e+06u
 .ends

@mithro
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mithro commented Oct 26, 2020

I updated all the comments by fixing the patch diff direction.

@mithro
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mithro commented Oct 26, 2020 

diff --git a/cells/esd_rf_nfet_20v0_hbm/sky130_fd_pr__esd_rf_nfet_20v0_hbm_21vW60p00.spice b/cells/esd_rf_nfet_20v0_hbm/sky130_fd_pr__esd_rf_nfet_20v0_hbm_21vW60p00.spice
index 2fdaa52..2d04d13 100644
--- a/cells/esd_rf_nfet_20v0_hbm/sky130_fd_pr__esd_rf_nfet_20v0_hbm_21vW60p00.spice
+++ b/cells/esd_rf_nfet_20v0_hbm/sky130_fd_pr__esd_rf_nfet_20v0_hbm_21vW60p00.spice
@@ -16,6 +16,6 @@
 
 
 * Top level circuit sky130_fd_pr__esd_rf_nfet_20v0_hbm_21vW60p00
-X0 dw_n700_n714# SUBS SUBS SUBS sky130_fd_pr__nfet_20v0 w=1.5e+07u l=1.65e+07u
-X1 dw_n700_n714# SUBS SUBS SUBS sky130_fd_pr__nfet_20v0 w=1.5e+07u l=1.65e+07u
+X0 dw_n700_n714# SUBS SUBS SUBS sky130_fd_pr__nfet_20v0 w=3e+07u l=1.5e+06u
+X1 dw_n700_n714# SUBS SUBS SUBS sky130_fd_pr__nfet_20v0 w=3e+07u l=1.5e+06u
 .end
diff --git a/cells/esd_rf_nfet_20v0_hbm/sky130_fd_pr__esd_rf_nfet_20v0_hbm_32vW60p00.spice b/cells/esd_rf_nfet_20v0_hbm/sky130_fd_pr__esd_rf_nfet_20v0_hbm_32vW60p00.spice
index 49e785e..2933bd3 100644
--- a/cells/esd_rf_nfet_20v0_hbm/sky130_fd_pr__esd_rf_nfet_20v0_hbm_32vW60p00.spice
+++ b/cells/esd_rf_nfet_20v0_hbm/sky130_fd_pr__esd_rf_nfet_20v0_hbm_32vW60p00.spice
@@ -16,6 +16,6 @@
 
 
 * Top level circuit sky130_fd_pr__esd_rf_nfet_20v0_hbm_32vW60p00
-X0 dw_n700_n714# SUBS SUBS SUBS sky130_fd_pr__nfet_20v0 w=1.5e+07u l=1.65e+07u
-X1 dw_n700_n714# SUBS SUBS SUBS sky130_fd_pr__nfet_20v0 w=1.5e+07u l=1.65e+07u
+X0 dw_n700_n714# SUBS SUBS SUBS sky130_fd_pr__nfet_20v0 w=3e+07u l=1.5e+06u
+X1 dw_n700_n714# SUBS SUBS SUBS sky130_fd_pr__nfet_20v0 w=3e+07u l=1.5e+06u
 .end
diff --git a/cells/esd_rf_nfet_20v0_iec/sky130_fd_pr__esd_rf_nfet_20v0_iec_21vW60p00.spice b/cells/esd_rf_nfet_20v0_iec/sky130_fd_pr__esd_rf_nfet_20v0_iec_21vW60p00.spice
index 9f0a289..2d11f01 100644
--- a/cells/esd_rf_nfet_20v0_iec/sky130_fd_pr__esd_rf_nfet_20v0_iec_21vW60p00.spice
+++ b/cells/esd_rf_nfet_20v0_iec/sky130_fd_pr__esd_rf_nfet_20v0_iec_21vW60p00.spice
@@ -16,6 +16,6 @@
 
 
 * Top level circuit sky130_fd_pr__esd_rf_nfet_20v0_iec_21vW60p00
-X0 dw_n700_n714# SUBS SUBS SUBS sky130_fd_pr__nfet_20v0 w=1.5e+07u l=1.65e+07u
-X1 dw_n700_n714# SUBS SUBS SUBS sky130_fd_pr__nfet_20v0 w=1.5e+07u l=1.65e+07u
+X0 dw_n700_n714# SUBS SUBS SUBS sky130_fd_pr__nfet_20v0 w=3e+07u l=1.5e+06u
+X1 dw_n700_n714# SUBS SUBS SUBS sky130_fd_pr__nfet_20v0 w=3e+07u l=1.5e+06u
 .end
diff --git a/cells/esd_rf_nfet_20v0_iec/sky130_fd_pr__esd_rf_nfet_20v0_iec_32vW60p00.spice b/cells/esd_rf_nfet_20v0_iec/sky130_fd_pr__esd_rf_nfet_20v0_iec_32vW60p00.spice
index 60df9ba..58fbf7a 100644
--- a/cells/esd_rf_nfet_20v0_iec/sky130_fd_pr__esd_rf_nfet_20v0_iec_32vW60p00.spice
+++ b/cells/esd_rf_nfet_20v0_iec/sky130_fd_pr__esd_rf_nfet_20v0_iec_32vW60p00.spice
@@ -16,6 +16,6 @@
 
 
 * Top level circuit sky130_fd_pr__esd_rf_nfet_20v0_iec_32vW60p00
-X0 dw_n700_n714# SUBS SUBS SUBS sky130_fd_pr__nfet_20v0 w=1.5e+07u l=1.65e+07u
-X1 dw_n700_n714# SUBS SUBS SUBS sky130_fd_pr__nfet_20v0 w=1.5e+07u l=1.65e+07u
+X0 dw_n700_n714# SUBS SUBS SUBS sky130_fd_pr__nfet_20v0 w=3e+07u l=1.5e+06u
+X1 dw_n700_n714# SUBS SUBS SUBS sky130_fd_pr__nfet_20v0 w=3e+07u l=1.5e+06u
 .end
diff --git a/cells/npn_11v0/sky130_fd_pr__npn_11v0_W1p00L1p00.spice b/cells/npn_11v0/sky130_fd_pr__npn_11v0_W1p00L1p00.spice
index 94e75c7..35c799d 100644
--- a/cells/npn_11v0/sky130_fd_pr__npn_11v0_W1p00L1p00.spice
+++ b/cells/npn_11v0/sky130_fd_pr__npn_11v0_W1p00L1p00.spice
@@ -16,5 +16,5 @@
 
 
 .subckt sky130_fd_pr__npn_11v0_W1p00L1p00 B C E
-X0 C E E SUBS sky130_fd_pr__nfet_20v0 w=3e+06u l=3.52e+06u
+X0 C E E SUBS sky130_fd_pr__nfet_20v0 w=5.95e+06u l=130000u
 .ends
diff --git a/cells/rf_nfet_20v0_aup/sky130_fd_pr__rf_nfet_20v0_aup.spice b/cells/rf_nfet_20v0_aup/sky130_fd_pr__rf_nfet_20v0_aup.spice
index 300aab8..633525b 100644
--- a/cells/rf_nfet_20v0_aup/sky130_fd_pr__rf_nfet_20v0_aup.spice
+++ b/cells/rf_nfet_20v0_aup/sky130_fd_pr__rf_nfet_20v0_aup.spice
@@ -16,6 +16,6 @@
 
 
 * Top level circuit sky130_fd_pr__rf_nfet_20v0_aup
-X0 dw_n700_n714# a_n900_n1000# a_1050_0# SUBS sky130_fd_pr__nfet_20v0 w=1.5e+07u l=1.65e+07u
-X1 dw_n700_n714# a_n900_n1000# a_n958_0# SUBS sky130_fd_pr__nfet_20v0 w=1.5e+07u l=1.65e+07u
+X0 dw_n700_n714# a_n900_n1000# a_1050_0# SUBS sky130_fd_pr__nfet_20v0 w=3e+07u l=1.5e+06u
+X1 dw_n700_n714# a_n900_n1000# a_n958_0# SUBS sky130_fd_pr__nfet_20v0 w=3e+07u l=1.5e+06u
 .end
diff --git a/cells/rf_nfet_20v0_noptap_iso/sky130_fd_pr__rf_nfet_20v0_noptap_iso.spice b/cells/rf_nfet_20v0_noptap_iso/sky130_fd_pr__rf_nfet_20v0_noptap_iso.spice
index a18d91b..10ecd25 100644
--- a/cells/rf_nfet_20v0_noptap_iso/sky130_fd_pr__rf_nfet_20v0_noptap_iso.spice
+++ b/cells/rf_nfet_20v0_noptap_iso/sky130_fd_pr__rf_nfet_20v0_noptap_iso.spice
@@ -16,6 +16,6 @@
 
 
 * Top level circuit sky130_fd_pr__rf_nfet_20v0_noptap_iso
-X0 dw_n2476_n1400# a_n700_n800# a_1000_0# SUBS sky130_fd_pr__nfet_20v0 w=1.5e+07u l=1.65e+07u
-X1 dw_n2476_n1400# a_n700_n800# a_n826_0# SUBS sky130_fd_pr__nfet_20v0 w=1.5e+07u l=1.65e+07u
+X0 dw_n2476_n1400# a_n700_n800# a_1000_0# SUBS sky130_fd_pr__nfet_20v0 w=3e+07u l=1.5e+06u
+X1 dw_n2476_n1400# a_n700_n800# a_n826_0# SUBS sky130_fd_pr__nfet_20v0 w=3e+07u l=1.5e+06u
 .end
diff --git a/cells/rf_nfet_20v0_nvt_aup/sky130_fd_pr__rf_nfet_20v0_nvt_aup.spice b/cells/rf_nfet_20v0_nvt_aup/sky130_fd_pr__rf_nfet_20v0_nvt_aup.spice
index 248404d..694bf13 100644
--- a/cells/rf_nfet_20v0_nvt_aup/sky130_fd_pr__rf_nfet_20v0_nvt_aup.spice
+++ b/cells/rf_nfet_20v0_nvt_aup/sky130_fd_pr__rf_nfet_20v0_nvt_aup.spice
@@ -16,6 +16,6 @@
 
 
 .subckt sky130_fd_pr__rf_nfet_20v0_nvt_aup D PSUB S
-X0 D a_n900_n1000# S PSUB sky130_fd_pr__nfet_20v0_nvt w=1.5e+07u l=1.65e+07u
-X1 D a_n900_n1000# S PSUB sky130_fd_pr__nfet_20v0_nvt w=1.5e+07u l=1.65e+07u
+X0 D a_n900_n1000# S PSUB sky130_fd_pr__nfet_20v0_nvt w=3e+07u l=1.5e+06u
+X1 D a_n900_n1000# S PSUB sky130_fd_pr__nfet_20v0_nvt w=3e+07u l=1.5e+06u
 .ends
diff --git a/cells/rf_nfet_20v0_nvt_noptap_iso/sky130_fd_pr__rf_nfet_20v0_nvt_noptap_iso.spice b/cells/rf_nfet_20v0_nvt_noptap_iso/sky130_fd_pr__rf_nfet_20v0_nvt_noptap_iso.spice
index b8f1ffe..49507e4 100644
--- a/cells/rf_nfet_20v0_nvt_noptap_iso/sky130_fd_pr__rf_nfet_20v0_nvt_noptap_iso.spice
+++ b/cells/rf_nfet_20v0_nvt_noptap_iso/sky130_fd_pr__rf_nfet_20v0_nvt_noptap_iso.spice
@@ -16,6 +16,6 @@
 
 
 * Top level circuit sky130_fd_pr__rf_nfet_20v0_nvt_noptap_iso
-X0 dw_n2476_n1400# a_n700_n800# a_1000_0# SUBS sky130_fd_pr__nfet_20v0_nvt w=1.5e+07u l=1.65e+07u
-X1 dw_n2476_n1400# a_n700_n800# a_n826_0# SUBS sky130_fd_pr__nfet_20v0_nvt w=1.5e+07u l=1.65e+07u
+X0 dw_n2476_n1400# a_n700_n800# a_1000_0# SUBS sky130_fd_pr__nfet_20v0_nvt w=3e+07u l=1.5e+06u
+X1 dw_n2476_n1400# a_n700_n800# a_n826_0# SUBS sky130_fd_pr__nfet_20v0_nvt w=3e+07u l=1.5e+06u
 .end
diff --git a/cells/rf_nfet_20v0_nvt_withptap/sky130_fd_pr__rf_nfet_20v0_nvt_withptap.spice b/cells/rf_nfet_20v0_nvt_withptap/sky130_fd_pr__rf_nfet_20v0_nvt_withptap.spice
index 4b72840..614bb9c 100644
--- a/cells/rf_nfet_20v0_nvt_withptap/sky130_fd_pr__rf_nfet_20v0_nvt_withptap.spice
+++ b/cells/rf_nfet_20v0_nvt_withptap/sky130_fd_pr__rf_nfet_20v0_nvt_withptap.spice
@@ -16,6 +16,6 @@
 
 
 .subckt sky130_fd_pr__rf_nfet_20v0_nvt_withptap D G PSUB S
-X0 D G S PSUB sky130_fd_pr__nfet_20v0_nvt w=1.5e+07u l=1.65e+07u
-X1 D G S PSUB sky130_fd_pr__nfet_20v0_nvt w=1.5e+07u l=1.65e+07u
+X0 D G S PSUB sky130_fd_pr__nfet_20v0_nvt w=3e+07u l=1.5e+06u
+X1 D G S PSUB sky130_fd_pr__nfet_20v0_nvt w=3e+07u l=1.5e+06u
 .ends
diff --git a/cells/rf_nfet_20v0_nvt_withptap_iso/sky130_fd_pr__rf_nfet_20v0_nvt_withptap_iso.spice b/cells/rf_nfet_20v0_nvt_withptap_iso/sky130_fd_pr__rf_nfet_20v0_nvt_withptap_iso.spice
index 09299cd..3af7136 100644
--- a/cells/rf_nfet_20v0_nvt_withptap_iso/sky130_fd_pr__rf_nfet_20v0_nvt_withptap_iso.spice
+++ b/cells/rf_nfet_20v0_nvt_withptap_iso/sky130_fd_pr__rf_nfet_20v0_nvt_withptap_iso.spice
@@ -16,6 +16,6 @@
 
 
 * Top level circuit sky130_fd_pr__rf_nfet_20v0_nvt_withptap_iso
-X0 dw_n2476_n1400# a_n700_n800# a_1000_0# SUBS sky130_fd_pr__nfet_20v0_nvt w=1.5e+07u l=1.65e+07u
-X1 dw_n2476_n1400# a_n700_n800# a_n826_0# SUBS sky130_fd_pr__nfet_20v0_nvt w=1.5e+07u l=1.65e+07u
+X0 dw_n2476_n1400# a_n700_n800# a_1000_0# SUBS sky130_fd_pr__nfet_20v0_nvt w=3e+07u l=1.5e+06u
+X1 dw_n2476_n1400# a_n700_n800# a_n826_0# SUBS sky130_fd_pr__nfet_20v0_nvt w=3e+07u l=1.5e+06u
 .end
diff --git a/cells/rf_nfet_20v0_withptap/sky130_fd_pr__rf_nfet_20v0_withptap.spice b/cells/rf_nfet_20v0_withptap/sky130_fd_pr__rf_nfet_20v0_withptap.spice
index a77af6c..78bc381 100644
--- a/cells/rf_nfet_20v0_withptap/sky130_fd_pr__rf_nfet_20v0_withptap.spice
+++ b/cells/rf_nfet_20v0_withptap/sky130_fd_pr__rf_nfet_20v0_withptap.spice
@@ -16,6 +16,6 @@
 
 
 * Top level circuit sky130_fd_pr__rf_nfet_20v0_withptap
-X0 dw_n700_n714# a_n900_n1000# a_1050_0# SUBS sky130_fd_pr__nfet_20v0 w=1.5e+07u l=1.65e+07u
-X1 dw_n700_n714# a_n900_n1000# a_n958_0# SUBS sky130_fd_pr__nfet_20v0 w=1.5e+07u l=1.65e+07u
+X0 dw_n700_n714# a_n900_n1000# a_1050_0# SUBS sky130_fd_pr__nfet_20v0 w=3e+07u l=1.5e+06u
+X1 dw_n700_n714# a_n900_n1000# a_n958_0# SUBS sky130_fd_pr__nfet_20v0 w=3e+07u l=1.5e+06u
 .end
diff --git a/cells/rf_nfet_20v0_withptap_iso/sky130_fd_pr__rf_nfet_20v0_withptap_iso.spice b/cells/rf_nfet_20v0_withptap_iso/sky130_fd_pr__rf_nfet_20v0_withptap_iso.spice
index 4869d7e..65e700f 100644
--- a/cells/rf_nfet_20v0_withptap_iso/sky130_fd_pr__rf_nfet_20v0_withptap_iso.spice
+++ b/cells/rf_nfet_20v0_withptap_iso/sky130_fd_pr__rf_nfet_20v0_withptap_iso.spice
@@ -16,6 +16,6 @@
 
 
 * Top level circuit sky130_fd_pr__rf_nfet_20v0_withptap_iso
-X0 dw_n2476_n1400# a_n700_n800# a_1000_0# SUBS sky130_fd_pr__nfet_20v0 w=1.5e+07u l=1.65e+07u
-X1 dw_n2476_n1400# a_n700_n800# a_n826_0# SUBS sky130_fd_pr__nfet_20v0 w=1.5e+07u l=1.65e+07u
+X0 dw_n2476_n1400# a_n700_n800# a_1000_0# SUBS sky130_fd_pr__nfet_20v0 w=3e+07u l=1.5e+06u
+X1 dw_n2476_n1400# a_n700_n800# a_n826_0# SUBS sky130_fd_pr__nfet_20v0 w=3e+07u l=1.5e+06u
 .end
diff --git a/cells/rf_nfet_20v0_zvt_withptap/sky130_fd_pr__rf_nfet_20v0_zvt_withptap.spice b/cells/rf_nfet_20v0_zvt_withptap/sky130_fd_pr__rf_nfet_20v0_zvt_withptap.spice
index 01aafe4..e654882 100644
--- a/cells/rf_nfet_20v0_zvt_withptap/sky130_fd_pr__rf_nfet_20v0_zvt_withptap.spice
+++ b/cells/rf_nfet_20v0_zvt_withptap/sky130_fd_pr__rf_nfet_20v0_zvt_withptap.spice
@@ -16,6 +16,6 @@
 
 
 .subckt sky130_fd_pr__rf_nfet_20v0_zvt_withptap D PSUB S
-X0 D a_n1600_n800# S PSUB sky130_fd_pr__nfet_20v0_nvt w=1.5e+07u l=2.1e+07u
-X1 D a_n1600_n800# S PSUB sky130_fd_pr__nfet_20v0_nvt w=1.5e+07u l=2.1e+07u
+X0 D a_n1600_n800# S PSUB sky130_fd_pr__nfet_20v0_nvt w=3e+07u l=6e+06u
+X1 D a_n1600_n800# S PSUB sky130_fd_pr__nfet_20v0_nvt w=3e+07u l=6e+06u
 .ends
diff --git a/cells/rf_pfet_20v0_withptap/sky130_fd_pr__rf_pfet_20v0_withptap.spice b/cells/rf_pfet_20v0_withptap/sky130_fd_pr__rf_pfet_20v0_withptap.spice
index 7cebb46..2e5879c 100644
--- a/cells/rf_pfet_20v0_withptap/sky130_fd_pr__rf_pfet_20v0_withptap.spice
+++ b/cells/rf_pfet_20v0_withptap/sky130_fd_pr__rf_pfet_20v0_withptap.spice
@@ -16,6 +16,6 @@
 
 
 * Top level circuit sky130_fd_pr__rf_pfet_20v0_withptap
-X0 SUBS a_n600_n800# a_750_0# dw_n1298_n1522# sky130_fd_pr__pfet_20v0 w=1.5e+07u l=1.55e+07u
-X1 SUBS a_n600_n800# a_n658_0# dw_n1298_n1522# sky130_fd_pr__pfet_20v0 w=1.5e+07u l=1.55e+07u
+X0 SUBS a_n600_n800# a_750_0# dw_n1298_n1522# sky130_fd_pr__pfet_20v0 w=3e+07u l=500000u
+X1 SUBS a_n600_n800# a_n658_0# dw_n1298_n1522# sky130_fd_pr__pfet_20v0 w=3e+07u l=500000u
 .end

mithro added a commit to mithro/skywater-pdk that referenced this issue Oct 26, 2020
@mithro
Updating submodules to improve spice and CDL files.
3f7bafe 
Fix incorrect extracted parameters in spice files (which fixes
google#192).

Fix missing port in CDL files (which fixes
google#191).

 - Updating [`sky130_fd_pr` latest](https://foss-eda-tools.googlesource.com/skywater-pdk/libs/sky130_fd_pr/+/v0.20.0-10-g3195d6d..v0.20.0-28-g6b9ba08) to v0.20.0-28-g6b9ba08
 - Updating [`sky130_fd_pr` v0.0.9](https://foss-eda-tools.googlesource.com/skywater-pdk/libs/sky130_fd_pr/+/v0.0.9-1-g88be317..v0.0.9-3-ged20a7f) to v0.0.9-3-ged20a7f
 - Updating [`sky130_fd_pr` v0.10.0](https://foss-eda-tools.googlesource.com/skywater-pdk/libs/sky130_fd_pr/+/v0.10.0-2-g4ef3a9f..v0.10.0-6-g54c1ee1) to v0.10.0-6-g54c1ee1
 - Updating [`sky130_fd_pr` v0.10.1](https://foss-eda-tools.googlesource.com/skywater-pdk/libs/sky130_fd_pr/+/v0.10.1-3-g78516f4..v0.10.1-9-g46a6658) to v0.10.1-9-g46a6658
 - Updating [`sky130_fd_pr` v0.11.0](https://foss-eda-tools.googlesource.com/skywater-pdk/libs/sky130_fd_pr/+/v0.11.0-4-gb192529..v0.11.0-12-g4596aee) to v0.11.0-12-g4596aee
 - Updating [`sky130_fd_pr` v0.12.0](https://foss-eda-tools.googlesource.com/skywater-pdk/libs/sky130_fd_pr/+/v0.12.0-5-gc639b95..v0.12.0-15-g30e5e33) to v0.12.0-15-g30e5e33
 - Updating [`sky130_fd_pr` v0.12.1](https://foss-eda-tools.googlesource.com/skywater-pdk/libs/sky130_fd_pr/+/v0.12.1-6-g78ec0b6..v0.12.1-18-g3f9ec20) to v0.12.1-18-g3f9ec20
 - Updating [`sky130_fd_pr` v0.13.0](https://foss-eda-tools.googlesource.com/skywater-pdk/libs/sky130_fd_pr/+/v0.13.0-7-gef7ae9d..v0.13.0-21-g29fa6f3) to v0.13.0-21-g29fa6f3
 - Updating [`sky130_fd_pr` v0.20.0](https://foss-eda-tools.googlesource.com/skywater-pdk/libs/sky130_fd_pr/+/v0.20.0-8-g668e396..v0.20.0-24-g66a8c2d) to v0.20.0-24-g66a8c2d
 - Updating [`sky130_fd_pr` v0.20.1](https://foss-eda-tools.googlesource.com/skywater-pdk/libs/sky130_fd_pr/+/v0.20.1-9-g3195d6d..v0.20.1-27-g6b9ba08) to v0.20.1-27-g6b9ba08

 * libraries/sky130_fd_pr/latest 3195d6d...6b9ba08 (2):
   > Fix incorrect extracted parameters in spice files.
   > Fix missing port in CDL files.

 * libraries/sky130_fd_pr/v0.0.9 88be317...ed20a7f (2):
   > Fix incorrect extracted parameters in spice files.
   > Fix missing port in CDL files.

 * libraries/sky130_fd_pr/v0.10.0 4ef3a9f...54c1ee1 (2):
   > Fix incorrect extracted parameters in spice files.
   > Fix missing port in CDL files.

 * libraries/sky130_fd_pr/v0.10.1 78516f4...46a6658 (2):
   > Fix incorrect extracted parameters in spice files.
   > Fix missing port in CDL files.

 * libraries/sky130_fd_pr/v0.11.0 b192529...4596aee (2):
   > Fix incorrect extracted parameters in spice files.
   > Fix missing port in CDL files.

 * libraries/sky130_fd_pr/v0.12.0 c639b95...30e5e33 (2):
   > Fix incorrect extracted parameters in spice files.
   > Fix missing port in CDL files.

 * libraries/sky130_fd_pr/v0.12.1 78ec0b6...3f9ec20 (2):
   > Fix incorrect extracted parameters in spice files.
   > Fix missing port in CDL files.

 * libraries/sky130_fd_pr/v0.13.0 ef7ae9d...29fa6f3 (2):
   > Fix incorrect extracted parameters in spice files.
   > Fix missing port in CDL files.

 * libraries/sky130_fd_pr/v0.20.0 668e396...66a8c2d (2):
   > Fix incorrect extracted parameters in spice files.
   > Fix missing port in CDL files.

 * libraries/sky130_fd_pr/v0.20.1 3195d6d...6b9ba08 (2):
   > Fix incorrect extracted parameters in spice files.
   > Fix missing port in CDL files.

Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
@mithro mithro mentioned this issue Oct 26, 2020
Merged
eskiyerli pushed a commit to eskiyerli/sky130_reveda that referenced this issue Oct 8, 2021
@mithro
Fix incorrect extracted parameters in spice files.
ed20a7f 
Magic was updated to fix the extracted parameter values.

Fixes google/skywater-pdk#192

Signed-off-by: Tim 'mithro' Ansell <tansell@google.com>
eskiyerli pushed a commit to eskiyerli/sky130_reveda that referenced this issue Oct 8, 2021
@mithro
Fix incorrect extracted parameters in spice files.
54c1ee1 
Magic was updated to fix the extracted parameter values.

Fixes google/skywater-pdk#192

Signed-off-by: Tim 'mithro' Ansell <tansell@google.com>
eskiyerli pushed a commit to eskiyerli/sky130_reveda that referenced this issue Oct 8, 2021
@mithro
Fix incorrect extracted parameters in spice files.
46a6658 
Magic was updated to fix the extracted parameter values.

Fixes google/skywater-pdk#192

Signed-off-by: Tim 'mithro' Ansell <tansell@google.com>
eskiyerli pushed a commit to eskiyerli/sky130_reveda that referenced this issue Oct 8, 2021
@mithro
Fix incorrect extracted parameters in spice files.
4596aee 
Magic was updated to fix the extracted parameter values.

Fixes google/skywater-pdk#192

Signed-off-by: Tim 'mithro' Ansell <tansell@google.com>
eskiyerli pushed a commit to eskiyerli/sky130_reveda that referenced this issue Oct 8, 2021
@mithro
Fix incorrect extracted parameters in spice files.
30e5e33 
Magic was updated to fix the extracted parameter values.

Fixes google/skywater-pdk#192

Signed-off-by: Tim 'mithro' Ansell <tansell@google.com>
eskiyerli pushed a commit to eskiyerli/sky130_reveda that referenced this issue Oct 8, 2021
@mithro
Fix incorrect extracted parameters in spice files.
3f9ec20 
Magic was updated to fix the extracted parameter values.

Fixes google/skywater-pdk#192

Signed-off-by: Tim 'mithro' Ansell <tansell@google.com>
eskiyerli pushed a commit to eskiyerli/sky130_reveda that referenced this issue Oct 8, 2021
@mithro
Fix incorrect extracted parameters in spice files.
29fa6f3 
Magic was updated to fix the extracted parameter values.

Fixes google/skywater-pdk#192

Signed-off-by: Tim 'mithro' Ansell <tansell@google.com>
eskiyerli pushed a commit to eskiyerli/sky130_reveda that referenced this issue Oct 8, 2021
@mithro
Fix incorrect extracted parameters in spice files.
66a8c2d 
Magic was updated to fix the extracted parameter values.

Fixes google/skywater-pdk#192

Signed-off-by: Tim 'mithro' Ansell <tansell@google.com>
eskiyerli pushed a commit to eskiyerli/sky130_reveda that referenced this issue Oct 8, 2021
@mithro
Fix incorrect extracted parameters in spice files.
6b9ba08 
Magic was updated to fix the extracted parameter values.

Fixes google/skywater-pdk#192

Signed-off-by: Tim 'mithro' Ansell <tansell@google.com>
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files-model-spice Issues related to Spice model files. lib-sky130_fd_pr Issues with the base primitive cells provided by the SkyWater foundry. type-bug Something isn't working
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Updating submodules to improve spice and CDL files. mithro/skywater-pdk
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