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PR 25: Added BMI1, BMI2, F16C, MOVEBE, and aligned-allocation/free plus some minor additions. + additional commits #26

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merged 36 commits into from
Jul 26, 2024

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@guzba guzba commented Jul 26, 2024

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Asc2011 and others added 30 commits February 25, 2024 23:33
Following the sources by Felix Cloutier, i tried to read the Cacheline-size from EAX leg-1. It's giving me a value of 8, that needs to be multiplied by 8. And that gives me 64-byte - but it may be just a coincidence ;) So pls. take a look - it' rather q&d...
Just a little test to how the package is structured. This supports  F16C a.k.a Float16 or 'half precision floats'. Not to mix up with 'brain-floats' - thats also 16-bit, but comes with a different encoding.
needs some some testing...
added the {.pop.} at the end..
just begun to look into it...
Some older prbly. not so important tags. Though the CompareExchange16-Tag is interesting. And some of the BMI2 operations, as well.
Three functions from SSE1-times - i guess they fit in nice here. 
I just started to use malloc and free and had no issues so far.
It's seem a nice way to get aligned allocations, which had been discussed on the nim-forum..
finished Tags BM11 and BMI2
MOVBE fns in movbe.nim
added Tags BMI1, BMI2, F16C, MOVBE
added older AVX2 broadcasts `mm_broadcast<x>_<type>`and movbe.nim into the right folder.
movbe.nim belongs in /src/nimsimd/
missing 'mm_blend_epi32' in AVX2
changed `static pointer` into `pointer`.
fixed return vector(s) from 'M256d/M256' in : 
- `mm_permutevar_pd() :M128d`
- `mm_permutevar_ps()  :M128`
fixed signatures in :
- storebe_i16()
- storebe_i32()
- storebe_i64()
edit signature :
- bextr_u64()
edited signatures : 
- bzhi_u32
- bzhi_u64
- mulx_u32
- mulx_u64
@guzba guzba merged commit e1f8415 into master Jul 26, 2024
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2 participants