Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

[herd] SVE Vector ADD instruction does not operate element-wise #860

Closed
maranget opened this issue May 10, 2024 · 3 comments
Closed

[herd] SVE Vector ADD instruction does not operate element-wise #860

maranget opened this issue May 10, 2024 · 3 comments

Comments

@maranget
Copy link
Member

maranget commented May 10, 2024

In herd, the ADD instruction does not operate element wise. Consider:

AArch64 V26
{
uint64_t t[2] = {0xffffffffffffffff,0x0};
uint64_t u[2] = {0x1,0x0};
0:X0=t; 0:X1=u;
}
  P0                   ;
 PTRUE P0.D,VL2        ;
 LD1D {Z0.D},P0/Z,[X0] ;
 LD1D {Z1.D},P0/Z,[X1] ;
 ADD Z0.D,Z0.D,Z1.D    ;
 ST1D {Z0.D},P0,[X0]   ;
locations [t;]

Running the test on herd we see that the addition is performed globally on 128bit valiues:

% herd7 -variant sve V26.litmus
Test V26 Required
States 1
t={0x0,0x1};
...

However running on hardware (more exactly on qemu), additions are performed element-wise:

Test V26 Required
Histogram (1 states)
40    :>t={0x0,0x0};
...
@murzinv
Copy link

murzinv commented May 11, 2024

Thanks for report @maranget , I'll have a look.

murzinv pushed a commit to murzinv/herdtools7 that referenced this issue May 17, 2024
It was reported in herd#860 that SVE vector ADD instruction does not
operate element-wise. It tuns out that Neon vector ADD instruction has
the same issue. Fix both by operating element-wise.

Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
murzinv pushed a commit to murzinv/herdtools7 that referenced this issue May 29, 2024
It was reported in herd#860 that SVE vector ADD instruction does not
operate element-wise. It tuns out that Neon vector ADD instruction has
the same issue. Fix both by operating element-wise.

Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
murzinv pushed a commit to murzinv/herdtools7 that referenced this issue Jun 3, 2024
It was reported in herd#860 that SVE vector ADD instruction does not
operate element-wise. It tuns out that Neon vector ADD instruction has
the same issue. Fix both by operating element-wise.

Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
murzinv pushed a commit to murzinv/herdtools7 that referenced this issue Jun 3, 2024
It was reported in herd#860 that SVE vector ADD instruction does not
operate element-wise. It tuns out that Neon vector ADD instruction has
the same issue. Fix both by operating element-wise.

Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
maranget added a commit that referenced this issue Jun 3, 2024
[herd] Fixes for Neon and SVE

Fixes issues related to  #860.
  + ADD on vectors are now performed element-wise.
  + High order elements not affected by operations (_e.g._ the 8 most significant bytes in `EOR V0.8B,...`) are now set to zero, as they should.
@murzinv
Copy link

murzinv commented Jun 3, 2024

Fixed in #864

@maranget
Copy link
Member Author

Issue solved, thanks @murzinv.

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

No branches or pull requests

2 participants