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[herd] SVE Vector ADD instruction does not operate element-wise #860
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Thanks for report @maranget , I'll have a look. |
murzinv
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It was reported in herd#860 that SVE vector ADD instruction does not operate element-wise. It tuns out that Neon vector ADD instruction has the same issue. Fix both by operating element-wise. Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
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May 29, 2024
It was reported in herd#860 that SVE vector ADD instruction does not operate element-wise. It tuns out that Neon vector ADD instruction has the same issue. Fix both by operating element-wise. Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
murzinv
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Jun 3, 2024
It was reported in herd#860 that SVE vector ADD instruction does not operate element-wise. It tuns out that Neon vector ADD instruction has the same issue. Fix both by operating element-wise. Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
murzinv
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Jun 3, 2024
It was reported in herd#860 that SVE vector ADD instruction does not operate element-wise. It tuns out that Neon vector ADD instruction has the same issue. Fix both by operating element-wise. Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
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[herd] Fixes for Neon and SVE Fixes issues related to #860. + ADD on vectors are now performed element-wise. + High order elements not affected by operations (_e.g._ the 8 most significant bytes in `EOR V0.8B,...`) are now set to zero, as they should.
Fixed in #864 |
Issue solved, thanks @murzinv. |
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In
herd
, theADD
instruction does not operate element wise. Consider:Running the test on
herd
we see that the addition is performed globally on 128bit valiues:However running on hardware (more exactly on qemu), additions are performed element-wise:
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