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rodinia
rodinia PublicForked from qbunia/rodinia
rodinia benchmark modified to run with ENZO and pathcu instead of nvcc CUDA compiler
C
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pyvsc
pyvsc PublicForked from fvutils/pyvsc
Python packages providing a library for Verification Stimulus and Coverage
Python
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riscv-dv
riscv-dv PublicForked from chipsalliance/riscv-dv
SV/UVM based instruction generator for RISC-V processor verification
SystemVerilog
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vim-config
vim-config PublicForked from j1z0/vim-config
my vim config to share amongst my machines
Vim Script
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ibex
ibex PublicForked from lowRISC/ibex
Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.
SystemVerilog
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