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net: pcs: xpcs: add CL37 1000BASE-X AN support
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For CL37 1000BASE-X AN, DW xPCS does not support C22 method but offers
C45 vendor-specific MII MMD for programming.

We also add the ability to disable Autoneg (through ethtool for certain
network switch that supports 1000BASE-X (1000Mbps and Full-Duplex) but
not Autoneg capability.

Tested-by: Emilio Riva <emilio.riva@ericsson.com>
Signed-off-by: Ong Boon Leong <boon.leong.ong@intel.com>
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@elvinongbl @intel-lab-lkp
elvinongbl authored and intel-lab-lkp committed Apr 22, 2022
1 parent 9c8774e commit dc88c5b
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Showing 2 changed files with 173 additions and 4 deletions.
174 changes: 171 additions & 3 deletions drivers/net/pcs/pcs-xpcs.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -77,6 +77,14 @@ static const int xpcs_sgmii_features[] = {
__ETHTOOL_LINK_MODE_MASK_NBITS,
};

static const int xpcs_1000basex_features[] = {
ETHTOOL_LINK_MODE_Pause_BIT,
ETHTOOL_LINK_MODE_Asym_Pause_BIT,
ETHTOOL_LINK_MODE_Autoneg_BIT,
ETHTOOL_LINK_MODE_1000baseX_Full_BIT,
__ETHTOOL_LINK_MODE_MASK_NBITS,
};

static const int xpcs_2500basex_features[] = {
ETHTOOL_LINK_MODE_Pause_BIT,
ETHTOOL_LINK_MODE_Asym_Pause_BIT,
Expand All @@ -102,6 +110,10 @@ static const phy_interface_t xpcs_sgmii_interfaces[] = {
PHY_INTERFACE_MODE_SGMII,
};

static const phy_interface_t xpcs_1000basex_interfaces[] = {
PHY_INTERFACE_MODE_1000BASEX,
};

static const phy_interface_t xpcs_2500basex_interfaces[] = {
PHY_INTERFACE_MODE_2500BASEX,
PHY_INTERFACE_MODE_MAX,
Expand All @@ -112,6 +124,7 @@ enum {
DW_XPCS_10GKR,
DW_XPCS_XLGMII,
DW_XPCS_SGMII,
DW_XPCS_1000BASEX,
DW_XPCS_2500BASEX,
DW_XPCS_INTERFACE_MAX,
};
Expand Down Expand Up @@ -239,6 +252,7 @@ static int xpcs_soft_reset(struct dw_xpcs *xpcs,
break;
case DW_AN_C37_SGMII:
case DW_2500BASEX:
case DW_AN_C37_1000BASEX:
dev = MDIO_MMD_VEND2;
break;
default:
Expand Down Expand Up @@ -774,6 +788,58 @@ static int xpcs_config_aneg_c37_sgmii(struct dw_xpcs *xpcs, unsigned int mode)
return ret;
}

static int xpcs_config_aneg_c37_1000basex(struct dw_xpcs *xpcs, unsigned int mode,
const unsigned long *advertising)
{
int ret, mdio_ctrl;

/* For AN for 1000BASE-X mode, the settings are :-
* 1) VR_MII_MMD_CTRL Bit(12) [AN_ENABLE] = 0b (Disable C37 AN in case
* it is already enabled)
* 2) VR_MII_AN_CTRL Bit(2:1)[PCS_MODE] = 00b (1000BASE-X C37)
* 3) SR_MII_AN_ADV Bit(6)[FD] = 1b (Full Duplex)
* Note: Half Duplex is rarely used, so don't advertise.
* 4) VR_MII_MMD_CTRL Bit(12) [AN_ENABLE] = 1b (Enable C37 AN)
*/
mdio_ctrl = xpcs_read(xpcs, MDIO_MMD_VEND2, DW_VR_MII_MMD_CTRL);
if (mdio_ctrl < 0)
return mdio_ctrl;

if (mdio_ctrl & AN_CL37_EN) {
ret = xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_MMD_CTRL,
mdio_ctrl & ~AN_CL37_EN);
if (ret < 0)
return ret;
}

ret = xpcs_read(xpcs, MDIO_MMD_VEND2, DW_VR_MII_AN_CTRL);
if (ret < 0)
return ret;

ret &= ~DW_VR_MII_PCS_MODE_MASK;
ret = xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_AN_CTRL, ret);
if (ret < 0)
return ret;

ret = xpcs_read(xpcs, MDIO_MMD_VEND2, MII_ADVERTISE);
ret |= ADVERTISE_1000XFULL;
ret = xpcs_write(xpcs, MDIO_MMD_VEND2, MII_ADVERTISE, ret);
if (ret < 0)
return ret;

/* Clear CL37 AN complete status */
ret = xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_AN_INTR_STS, 0);
if (ret < 0)
return ret;

if (phylink_autoneg_inband(mode) &&
linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, advertising))
ret = xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_MMD_CTRL,
mdio_ctrl | AN_CL37_EN);

return ret;
}

static int xpcs_config_2500basex(struct dw_xpcs *xpcs)
{
int ret;
Expand All @@ -797,7 +863,7 @@ static int xpcs_config_2500basex(struct dw_xpcs *xpcs)
}

int xpcs_do_config(struct dw_xpcs *xpcs, phy_interface_t interface,
unsigned int mode)
unsigned int mode, const unsigned long *advertising)
{
const struct xpcs_compat *compat;
int ret;
Expand All @@ -819,6 +885,12 @@ int xpcs_do_config(struct dw_xpcs *xpcs, phy_interface_t interface,
if (ret)
return ret;
break;
case DW_AN_C37_1000BASEX:
ret = xpcs_config_aneg_c37_1000basex(xpcs, mode,
advertising);
if (ret)
return ret;
break;
case DW_2500BASEX:
ret = xpcs_config_2500basex(xpcs);
if (ret)
Expand All @@ -845,7 +917,7 @@ static int xpcs_config(struct phylink_pcs *pcs, unsigned int mode,
{
struct dw_xpcs *xpcs = phylink_pcs_to_xpcs(pcs);

return xpcs_do_config(xpcs, interface, mode);
return xpcs_do_config(xpcs, interface, mode, advertising);
}

static int xpcs_get_state_c73(struct dw_xpcs *xpcs,
Expand All @@ -866,7 +938,7 @@ static int xpcs_get_state_c73(struct dw_xpcs *xpcs,

state->link = 0;

return xpcs_do_config(xpcs, state->interface, MLO_AN_INBAND);
return xpcs_do_config(xpcs, state->interface, MLO_AN_INBAND, NULL);
}

if (state->an_enabled && xpcs_aneg_done_c73(xpcs, state, compat)) {
Expand Down Expand Up @@ -923,6 +995,50 @@ static int xpcs_get_state_c37_sgmii(struct dw_xpcs *xpcs,
return 0;
}

static int xpcs_get_state_c37_1000basex(struct dw_xpcs *xpcs,
struct phylink_link_state *state)
{
int lpa, adv;
int ret;

ret = xpcs_read(xpcs, MDIO_MMD_VEND2, DW_VR_MII_MMD_CTRL);
if (ret < 0)
return ret;

if (ret & AN_CL37_EN) {
/* Reset link_state */
state->link = false;
state->speed = SPEED_UNKNOWN;
state->duplex = DUPLEX_UNKNOWN;
state->pause = 0;

lpa = xpcs_read(xpcs, MDIO_MMD_VEND2, MII_LPA);
if (lpa < 0 || lpa & LPA_RFAULT)
return false;

adv = xpcs_read(xpcs, MDIO_MMD_VEND2, MII_ADVERTISE);
if (adv < 0)
return false;

if (lpa & ADVERTISE_1000XFULL &&
adv & ADVERTISE_1000XFULL) {
state->speed = SPEED_1000;
state->duplex = DUPLEX_FULL;
state->link = true;
}

/* Clear CL37 AN complete status */
ret = xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_AN_INTR_STS, 0);
} else {
state->link = true;
state->speed = SPEED_1000;
state->duplex = DUPLEX_FULL;
state->pause = 0;
}

return 0;
}

static void xpcs_get_state(struct phylink_pcs *pcs,
struct phylink_link_state *state)
{
Expand Down Expand Up @@ -950,6 +1066,13 @@ static void xpcs_get_state(struct phylink_pcs *pcs,
ERR_PTR(ret));
}
break;
case DW_AN_C37_1000BASEX:
ret = xpcs_get_state_c37_1000basex(xpcs, state);
if (ret) {
pr_err("xpcs_get_state_c37_1000basex returned %pe\n",
ERR_PTR(ret));
}
break;
default:
return;
}
Expand Down Expand Up @@ -985,6 +1108,32 @@ static void xpcs_link_up_sgmii(struct dw_xpcs *xpcs, unsigned int mode,
pr_err("%s: xpcs_write returned %pe\n", __func__, ERR_PTR(ret));
}

static void xpcs_link_up_1000basex(struct dw_xpcs *xpcs, int speed,
int duplex)
{
int val, ret;

switch (speed) {
case SPEED_1000:
val = BMCR_SPEED1000;
break;
case SPEED_100:
case SPEED_10:
default:
pr_err("%s: speed = %d\n", __func__, speed);
return;
}

if (duplex == DUPLEX_FULL)
val |= BMCR_FULLDPLX;
else
pr_err("%s: half duplex not supported\n", __func__);

ret = xpcs_write(xpcs, MDIO_MMD_VEND2, MDIO_CTRL1, val);
if (ret)
pr_err("%s: xpcs_write returned %pe\n", __func__, ERR_PTR(ret));
}

void xpcs_link_up(struct phylink_pcs *pcs, unsigned int mode,
phy_interface_t interface, int speed, int duplex)
{
Expand All @@ -994,9 +1143,21 @@ void xpcs_link_up(struct phylink_pcs *pcs, unsigned int mode,
return xpcs_config_usxgmii(xpcs, speed);
if (interface == PHY_INTERFACE_MODE_SGMII)
return xpcs_link_up_sgmii(xpcs, mode, speed, duplex);
if (interface == PHY_INTERFACE_MODE_1000BASEX)
return xpcs_link_up_1000basex(xpcs, speed, duplex);
}
EXPORT_SYMBOL_GPL(xpcs_link_up);

static void xpcs_an_restart(struct phylink_pcs *pcs)
{
struct dw_xpcs *xpcs = phylink_pcs_to_xpcs(pcs);
int ret;

ret = xpcs_read(xpcs, MDIO_MMD_VEND2, MDIO_CTRL1);
ret |= BMCR_ANRESTART;
ret = xpcs_write(xpcs, MDIO_MMD_VEND2, MDIO_CTRL1, ret);
}

static u32 xpcs_get_id(struct dw_xpcs *xpcs)
{
int ret;
Expand Down Expand Up @@ -1062,6 +1223,12 @@ static const struct xpcs_compat synopsys_xpcs_compat[DW_XPCS_INTERFACE_MAX] = {
.num_interfaces = ARRAY_SIZE(xpcs_sgmii_interfaces),
.an_mode = DW_AN_C37_SGMII,
},
[DW_XPCS_1000BASEX] = {
.supported = xpcs_1000basex_features,
.interface = xpcs_1000basex_interfaces,
.num_interfaces = ARRAY_SIZE(xpcs_1000basex_interfaces),
.an_mode = DW_AN_C37_1000BASEX,
},
[DW_XPCS_2500BASEX] = {
.supported = xpcs_2500basex_features,
.interface = xpcs_2500basex_interfaces,
Expand Down Expand Up @@ -1117,6 +1284,7 @@ static const struct phylink_pcs_ops xpcs_phylink_ops = {
.pcs_validate = xpcs_validate,
.pcs_config = xpcs_config,
.pcs_get_state = xpcs_get_state,
.pcs_an_restart = xpcs_an_restart,
.pcs_link_up = xpcs_link_up,
};

Expand Down
3 changes: 2 additions & 1 deletion include/linux/pcs/pcs-xpcs.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -17,6 +17,7 @@
#define DW_AN_C73 1
#define DW_AN_C37_SGMII 2
#define DW_2500BASEX 3
#define DW_AN_C37_1000BASEX 4

struct xpcs_id;

Expand All @@ -30,7 +31,7 @@ int xpcs_get_an_mode(struct dw_xpcs *xpcs, phy_interface_t interface);
void xpcs_link_up(struct phylink_pcs *pcs, unsigned int mode,
phy_interface_t interface, int speed, int duplex);
int xpcs_do_config(struct dw_xpcs *xpcs, phy_interface_t interface,
unsigned int mode);
unsigned int mode, const unsigned long *advertising);
void xpcs_get_interfaces(struct dw_xpcs *xpcs, unsigned long *interfaces);
int xpcs_config_eee(struct dw_xpcs *xpcs, int mult_fact_100ns,
int enable);
Expand Down

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