[VAConfigAttribValEncHEVCBlockSizes] min/max_max_transform_hierarchy_depth_inter/intra don't have enough field bits

[sivileri]

In the struct VAConfigAttribValEncHEVCBlockSizes defined in here, the min/max fields for max_transform_hierarchy_depth_inter and max_transform_hierarchy_depth_intra are 2 bits wide, but from the HEVC codec standard, both those values:

...shall be in the range of 0 to CtbLog2SizeY − MinTbLog2SizeY, inclusive....

When the hardware needs to report a configuration like below, the fields overflow to zero.

MinCbLog2SizeY = log2(8) = 3
CtbLog2SizeY = log2(64) = 6
MinTbLog2SizeY = log2(4) = 2
MaxTbLog2SizeY = log2(32) = 5

// The variable MinTbLog2SizeY is set equal to log2_min_luma_transform_block_size_minus2 + 2. The CVS shall not
contain data that result in MinTbLog2SizeY greater than or equal to MinCbLog2SizeY.
assert(MinTbLog2SizeY (2) < MinCbLog2SizeY (3));

max_transform_hierarchy_depth_intra = (CtbLog2SizeY − MinTbLog2SizeY) = 4
max_transform_hierarchy_depth_inter = (CtbLog2SizeY − MinTbLog2SizeY) = 4

[XinfengZhang]

The variable MinTbLog2SizeY is set equal to log2_min_luma_transform_block_size_minus2 + 2. The CVS shall not
contain data that result in MinTbLog2SizeY greater than or equal to MinCbLog2SizeY.

[sivileri]

Thanks for the quick reply. Updated the full use case in the description, these values from the repro scenario are coming from real HW reporting these HEVC values in https://learn.microsoft.com/en-us/windows/win32/api/d3d12video/ns-d3d12video-d3d12_video_encoder_codec_configuration_hevc, I think it verifies that HEVC standard restriction but still overflows. If I'm not missing anything else here, I'd be happy to propose/work on a fix but would appreciate guidance on how the stable API versioning would work here.