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Support extension op sets in the VM compiler and runtime for i64/f32/f64 #2574

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5 tasks done
benvanik opened this issue Jul 19, 2020 · 3 comments · Fixed by #2742
Closed
5 tasks done

Support extension op sets in the VM compiler and runtime for i64/f32/f64 #2574

benvanik opened this issue Jul 19, 2020 · 3 comments · Fixed by #2742
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enhancement ➕ New feature or request runtime Relating to the IREE runtime library

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@benvanik
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benvanik commented Jul 19, 2020

The idea is to mimic RISCV and allow extensions to the VM. Some examples are 64-bit integer support, floating point (both 32 and 64-bit), and fixed or variable-length vector ops. These can be implemented as prefix bytes in the primary 0-255 set so we can easily detect and conditionally support ops at runtime (similar to classic cpuid checks).

Major tasks:

  • Cleanup bytecode_dispatch.c to be more readable (prior to copypastaing it)
  • Refactor bytecode_dispatch.c to be just the dispatch loop and move dispatches to separate textual_hdrs
  • Define prefix ops in op table and wire up to bytecode_dispatch
  • Pick one set of ops to add and test the system (i64?) end-to-end
  • Add compiler option in VM transformation to support the various feature flags

Open design issue:
we need to know way up at the flow dialect what our supported types are for both host and device - or support synthesizing appropriate conversions (which can be complicated if multiple devices are involved). For now we can punt on this as we don't support mixed devices, and we can just assert that the VM target supports the same types as the HAL backend for tensors.

@benvanik benvanik added enhancement ➕ New feature or request runtime Relating to the IREE runtime library labels Jul 19, 2020
@benvanik benvanik self-assigned this Jul 19, 2020
@benvanik benvanik added this to Ideas in Runtime Development via automation Jul 19, 2020
@benvanik benvanik moved this from Ideas to To do in Runtime Development Jul 19, 2020
@benvanik benvanik added this to the 2020Q3 Core milestone Jul 19, 2020
benvanik added a commit that referenced this issue Jul 19, 2020
…efs.

This makes it easier to read and could be auto generated at some point.

Progress on #2574.
@benvanik benvanik moved this from To do to In progress in Runtime Development Jul 21, 2020
@benvanik
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Update: progress happening here: https://github.com/google/iree/tree/benvanik-vm64-i64

Most of the ops are now present on both the compiler and runtime sides. Major work remaining is making register allocation aware of 64-bit registers (which to start may just be appended to i32 registers instead of aliasing) and adding the compiler flags/verification for the i64 extension (and others).

@benvanik
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Update; i64 PR out; std->vm is not implemented and I'll file an issue for that specifically, but after a follow-on CL that adds a compiler flag for enabling 64-bit support in the VM this should be completed at this level. Thankfully it's 95% of the work required to support i64, so future work on lowering into the 64-bit VM should be much easier for others to implement.

@benvanik
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With #2742 I think the bulk of the work in the VM is complete. There's remaining work to be tracked in #2728 for actually lowering from source dialects (HAL, XLA, etc) into the VM dialect.

Runtime Development automation moved this from In progress to Done Aug 14, 2020
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Labels
enhancement ➕ New feature or request runtime Relating to the IREE runtime library
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