GitHub - irskid5/Computer-Processor: Created and simulated a multi-thread, multi-cycle, pipelined processor using Verilog/Assembly, ran on an FPGA chip.

irskid5 / Computer-Processor Public

Created and simulated a multi-thread, multi-cycle, pipelined processor using Verilog/Assembly, ran on an FPGA chip.

Notifications

Name		Name	Last commit message	Last commit date
Latest commit History 1 Commit
ECE352_specific		ECE352_specific
multicycle_assembler		multicycle_assembler
multicycle_documentation		multicycle_documentation
processor_v3_verilog		processor_v3_verilog
ECE352 Final Project Handout.pdf		ECE352 Final Project Handout.pdf