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  1. Capstone Capstone Public

    Balancing Robot Senior Project

    VHDL 4 1

  2. Bluefruit-FPGA Bluefruit-FPGA Public

    VHDL module for interfacing Adafruit's Bluefruit LE UART friend with an FPGA

    VHDL

  3. Open-Source-FPGA-Bitcoin-Miner Open-Source-FPGA-Bitcoin-Miner Public

    Forked from fpgaminer/Open-Source-FPGA-Bitcoin-Miner

    A completely open source implementation of a Bitcoin Miner for Altera and Xilinx FPGAs. This project hopes to promote the free and open development of FPGA based mining solutions and secure the fut…

    VHDL

  4. AD7476A_fpga_intf AD7476A_fpga_intf Public

    Systemverilog implementation of a receiver for receiving data from an AD7476A ADC chip,

    SystemVerilog