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Bare metal: set up basic CPU exception handling, with IDT & TSS #640

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merged 2 commits into from
Sep 29, 2022
Merged

Bare metal: set up basic CPU exception handling, with IDT & TSS #640

merged 2 commits into from
Sep 29, 2022

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tkchia
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@tkchia tkchia commented Sep 24, 2022

When a CPU exception (e.g. protection fault, divide by zero) happens in bare metal mode, the program should now be able to catch the exception and dump some information on the exception to the serial console, if one ropes in (STATIC_YOINK) the symbol _idt.

I hope to get the exception handlers to dump information to the VGA screen as well. It seems I will need to modify kprintf to do this. Once this is implemented, it should be easier to diagnose any program crashes that occur on bare metal.

Thank you!

@tkchia tkchia marked this pull request as draft September 24, 2022 09:05
@tkchia tkchia marked this pull request as ready for review September 24, 2022 10:28
@ghaerr
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ghaerr commented Sep 24, 2022

Amazing work, @tkchia!

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@jart jart left a comment

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I can't say how impressed I am with this change. Doing this is something that's mystified me for quite some time.

ezlea .excep_msg,di # stack should be 16-byte aligned now
xor %eax,%eax # kprintf is variadic; remember to
# pass no. of vector regs. used (= 0)
call kprintf # print error message
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Is this going to force a dependency on kprintf() into o/tiny/examples/life.com? If so, we might want to do a one-off error report.

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Hello @jart,

Is this going to force a dependency on kprintf() into o/tiny/examples/life.com?

Not yet. I am trying to arrange to link in the IDT logic only when the program is already linking in some sort of crash debugging (I am still not familiar with how Cosmopolitan's crash debugging capability works).

Thank you!

mov %cs,%eax
stosw
mov %rdx,%rax
// ┌P:present
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I love how you did the CP437 diagrams.

@jart jart merged commit bc85326 into jart:master Sep 29, 2022
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tkchia commented Sep 30, 2022

Hello @jart,

Doing this is something that's mystified me for quite some time.

Well, it did take me quite a while to realize that I had to reload the GDTR to make it point to virtual memory — so that, when (re)loading %cs to service an interrupt, the CPU could properly load %cs 's descriptor from main memory, by way of the GDTR. I am not sure if this was the problem you encountered.

Thank you!

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3 participants