Skip to content
View jnestor's full-sized avatar
  • Lafayette College
  • Easton, Pennsylvania USA

Block or report jnestor

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Please don't include any personal information such as legal names or email addresses. Maximum 100 characters, markdown supported. This note will be visible to only you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse

Popular repositories Loading

  1. CADApps CADApps Public

    VLSI CAD Algorithm Visualizations implemented as Java Applications

    Java 15 4

  2. SV_Examples SV_Examples Public

    SystemVerilog examples - common building blocks

    SystemVerilog 10 1

  3. PlacementApp PlacementApp Public

    Animation of VLSI Placement/Floorplanning using Simulated Annealing or Iterative Improvement

    Java 7 1

  4. hw_pq hw_pq Public

    A family of hardware priority queue implementations

    SystemVerilog 5 1

  5. systolic_pq systolic_pq Public

    A SystemVerilog implementation of Lieserson's Systolic Priority Queue

    SystemVerilog 3 2

  6. ece414-examples ece414-examples Public

    RP2040 Sample Code for ECE 414 at Lafayette College

    C 2 1