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KVM: x86: Fold WRMSR fastpath helpers into the main handler
Fold the per-MSR WRMSR fastpath helpers into the main handler now that the IPI path in particular is relatively tiny. In addition to eliminating a decent amount of boilerplate, this removes the ugly -errno/1/0 => bool conversion (which is "necessitated" by kvm_x2apic_icr_write_fast()). Opportunistically drop the comment about IPIs, as the purpose of the fastpath is hopefully self-evident, and _if_ it needs more documentation, the documentation (and rules!) should be placed in a more central location. No functional change intended. Link: https://lore.kernel.org/r/20250805190526.1453366-9-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
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arch/x86/kvm/x86.c

Lines changed: 5 additions & 29 deletions
Original file line numberDiff line numberDiff line change
@@ -2134,48 +2134,24 @@ static inline bool kvm_vcpu_exit_request(struct kvm_vcpu *vcpu)
21342134
kvm_request_pending(vcpu) || xfer_to_guest_mode_work_pending();
21352135
}
21362136

2137-
/*
2138-
* The fast path for frequent and performance sensitive wrmsr emulation,
2139-
* i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
2140-
* the latency of virtual IPI by avoiding the expensive bits of transitioning
2141-
* from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
2142-
* other cases which must be called after interrupts are enabled on the host.
2143-
*/
2144-
static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu *vcpu, u64 data)
2145-
{
2146-
if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(vcpu->arch.apic))
2147-
return 1;
2148-
2149-
return kvm_x2apic_icr_write_fast(vcpu->arch.apic, data);
2150-
}
2151-
2152-
static int handle_fastpath_set_tscdeadline(struct kvm_vcpu *vcpu, u64 data)
2153-
{
2154-
kvm_set_lapic_tscdeadline_msr(vcpu, data);
2155-
return 0;
2156-
}
2157-
21582137
fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu)
21592138
{
21602139
u64 data = kvm_read_edx_eax(vcpu);
21612140
u32 msr = kvm_rcx_read(vcpu);
2162-
bool handled;
21632141
int r;
21642142

21652143
switch (msr) {
21662144
case APIC_BASE_MSR + (APIC_ICR >> 4):
2167-
handled = !handle_fastpath_set_x2apic_icr_irqoff(vcpu, data);
2145+
if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(vcpu->arch.apic) ||
2146+
kvm_x2apic_icr_write_fast(vcpu->arch.apic, data))
2147+
return EXIT_FASTPATH_NONE;
21682148
break;
21692149
case MSR_IA32_TSC_DEADLINE:
2170-
handled = !handle_fastpath_set_tscdeadline(vcpu, data);
2150+
kvm_set_lapic_tscdeadline_msr(vcpu, data);
21712151
break;
21722152
default:
2173-
handled = false;
2174-
break;
2175-
}
2176-
2177-
if (!handled)
21782153
return EXIT_FASTPATH_NONE;
2154+
}
21792155

21802156
kvm_vcpu_srcu_read_lock(vcpu);
21812157
r = kvm_skip_emulated_instruction(vcpu);

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