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Wire syntax #26

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Wire syntax #26

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Pull Request Test Coverage Report for Build 443

  • 65 of 68 (95.59%) changed or added relevant lines in 5 files are covered.
  • 1 unchanged line in 1 file lost coverage.
  • Overall coverage increased (+0.4%) to 72.228%

Changes Missing Coverage Covered Lines Changed/Added Lines %
silica/verilog.py 21 22 95.45%
silica/init.py 3 5 60.0%
Files with Coverage Reduction New Missed Lines %
silica/verilog.py 1 75.38%
Totals Coverage Status
Change from base Build 436: 0.4%
Covered Lines: 2117
Relevant Lines: 2931

💛 - Coveralls

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