[arm][gic] Ensure context switch doesn't happen from irq #276
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kernel/include/kernel/thread.h
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| /* Flag to indicate that interrupt | ||
| * context is active for the thread */ | ||
| uint32_t intr_ctxt_active; | ||
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| char name[32]; |
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Probably this could have been better handled by per CPU interrupt state.
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Also problematic is it is only implemented on ARM. For a new feature like this it really should be implemented on all of the architectures, at least if possible.
IIRC, there's an arch_in_interrupt_handler() routine that may be actually what you're looking for. Or at least having it be an arch_ routine that can be stubbed out by default if the arch doesn't want to implement it. I'm leery about adding state at the thread level.
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Hmm, actually looks like the arch_in_int_handler() is only basically implemented on cortex-m, since the 'big arm' one implements it as a global bool which is clearly not SMP safe. Looks like might make sense to fix that first.
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Thanks Travis for the feedback, makes sense. I will try to upload something for all the archs, assuming no arch wants to allow context switching to happen between IRQ handling.
vishals4gh
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Context switches should not happen from within the interrupt
context before interrupt is cleared by write to GIC EOIR register,
without it GIC will simply keep that interrupt active even if
the hardware source clears the interrupt to the gic, causing
subsequent irqs from the source to not get delivered to the CPU.
This change adds an assertion that context switch doesn't happen
from irq context before interrupt is EOIed. TCB field is added
to convey if the current thread has interrupt context active, if
so thread_resched should ideally not get called.
Signed-off-by: vannapurve vannapurve@google.com