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[ImportVerilog][MooreToCore]Lower moore.namedConstant to hw.constant & hw.wire #7122
[ImportVerilog][MooreToCore]Lower moore.namedConstant to hw.constant & hw.wire #7122
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Signed-off-by: mingzheTerapines <mingzhe.zhang@terapines.com>
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Because following varifying, mooretocore is stopped. When blocking this code will success.
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@fabianschuiki Hailong and I were wondering why hw.param.value has traits constant like and pure. |
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Sorry for taking so long to look at this!
I think the hw.param.*
are designed to work with parameters defined on the hw.module
. These would then be emitted in Verilog as module Foo #(<params>) ...
. If I'm not mistaken, hw.param.value
is used to take one of those module parameters (which is an attribute) and make it available as an SSA value. So this might not do what you need 🤔.
Have you tried lowering the named constants to an hw.wire
? If you give the wire an inner symbol name, it will not be deleted. For example:
%p1 = moore.named_constant parameter 1 : !moore.i32
// lower to
%0 = hw.constant 1 : i32
%p1 = hw.wire %0 sym @someUniqueSymbolName : i32
Thanks for your advice. In specialize pass in hw, hw.param.value with integer will be automatically replaced hw.constant. So it is the same for integer case. What's more, parameter in IEEE standard can accept more than integer attribute, so I think translate sv.parameter to hw.param.value is Okay. But other attribute type case this time will not be supported. Because we focus on basic need. I have updeted some codes and test, please have a look and thanks for your patient. |
@fabianschuiki Thanks @cepheus69 , module to core has been available now.
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…pines/circt into mingzhe-named_constant2Core
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Really nice!
Refer to #7083
For [ImportVerilog] this PR changed value to attribute for builder of
moore.named_constant
. Because for lower pass case it is hard to transform an value to an attribute.For [MooreToCore] this PR learned how
moore.constant
andhw.param.value
build and have this lowering method.String attribute will be supported later.