@@ -197,6 +197,8 @@ class SPIRVInstructionSelector : public InstructionSelector {
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bool selectOverflowArith (Register ResVReg, const SPIRVType *ResType,
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MachineInstr &I, unsigned Opcode) const ;
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+ bool selectDebugTrap (Register ResVReg, const SPIRVType *ResType,
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+ MachineInstr &I) const ;
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bool selectIntegerDot (Register ResVReg, const SPIRVType *ResType,
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MachineInstr &I, bool Signed) const ;
@@ -951,16 +953,26 @@ bool SPIRVInstructionSelector::spvSelect(Register ResVReg,
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// represent code after lowering or intrinsics which are not implemented but
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// should not crash when found in a customer's LLVM IR input.
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case TargetOpcode::G_TRAP:
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- case TargetOpcode::G_DEBUGTRAP:
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case TargetOpcode::G_UBSANTRAP:
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case TargetOpcode::DBG_LABEL:
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return true ;
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+ case TargetOpcode::G_DEBUGTRAP:
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+ return selectDebugTrap (ResVReg, ResType, I);
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default :
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return false ;
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}
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}
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+ bool SPIRVInstructionSelector::selectDebugTrap (Register ResVReg,
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+ const SPIRVType *ResType,
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+ MachineInstr &I) const {
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+ unsigned Opcode = SPIRV::OpNop;
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+ MachineBasicBlock &BB = *I.getParent ();
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+ return BuildMI (BB, I, I.getDebugLoc (), TII.get (Opcode))
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+ .constrainAllUses (TII, TRI, RBI);
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+ }
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+
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bool SPIRVInstructionSelector::selectExtInst (Register ResVReg,
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const SPIRVType *ResType,
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MachineInstr &I,
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