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resistordavidchisnalljrtc27
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[CodeGen, CHERI] Add capability types to MVT. (#156616)
This adds value types for representing capability types, enabling their use in instruction selection and other parts of the backend. These types are distinguished from each other only by size. This is sufficient, at least today, because no existing CHERI configuration supports multiple capability sizes simultaneously. Hybrid configurations supporting intermixed integral pointers and capabilities do exist, and are one of the reasons why these value types are needed beyond existing integral types. Co-authored-by: David Chisnall <theraven@theravensnest.org> Co-authored-by: Jessica Clarke <jrtc27@jrtc27.com>
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llvm/include/llvm/CodeGen/ValueTypes.h

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@@ -228,6 +228,11 @@ namespace llvm {
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return isSimple() ? V.is2048BitVector() : isExtended2048BitVector();
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}
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/// Return true if this is a capability type.
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bool isCheriCapability() const {
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return isSimple() ? V.isCheriCapability() : false;
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}
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/// Return true if this is an overloaded type for TableGen.
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bool isOverloaded() const {
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return (V == MVT::iAny || V == MVT::fAny || V == MVT::vAny ||

llvm/include/llvm/CodeGen/ValueTypes.td

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@@ -28,6 +28,7 @@ class ValueType<int size, int value> {
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// Indicates this VT should be included in the
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// [FIRST_VALUETYPE,LAST_VALUETYPE] range.
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bit isNormalValueType = true;
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bit isCheriCapability = false;
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}
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class VTAny<int value> : ValueType<0, value> {
@@ -65,6 +66,10 @@ class VTVecTup<int size, int nf, ValueType dummy_elt, int value>
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let isRISCVVecTuple = true;
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}
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class VTCheriCapability<int size, int value> : ValueType<size, value> {
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let isCheriCapability = true;
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}
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defset list<ValueType> ValueTypes = {
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def OtherVT : ValueType<0, 1> { // "Other" value
@@ -357,6 +362,11 @@ def amdgpuBufferStridedPointer : ValueType<192, 252>;
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def aarch64mfp8 : ValueType<8, 253>; // 8-bit value in FPR (AArch64)
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// CHERI capabilities. Pointer-like values that carry additional metadata
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// for enforcing safety guarantees on CHERI-enabled targets.
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def c64 : VTCheriCapability<64, 254>; // 64-bit CHERI capability value
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def c128 : VTCheriCapability<128, 255>; // 128-bit CHERI capability value
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let isNormalValueType = false in {
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def token : ValueType<0, 504>; // TokenTy
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def MetadataVT : ValueType<0, 505> { // Metadata

llvm/include/llvm/CodeGenTypes/MachineValueType.h

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@@ -178,6 +178,12 @@ namespace llvm {
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return (isFixedLengthVector() && getFixedSizeInBits() == 2048);
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}
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/// Return true if this is a CHERI capability type.
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bool isCheriCapability() const {
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return (SimpleTy >= MVT::FIRST_CHERI_CAPABILITY_VALUETYPE) &&
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(SimpleTy <= MVT::LAST_CHERI_CAPABILITY_VALUETYPE);
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}
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/// Return true if this is an overloaded type for TableGen.
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bool isOverloaded() const {
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switch (SimpleTy) {

llvm/lib/CodeGen/ValueTypes.cpp

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@@ -176,6 +176,8 @@ std::string EVT::getEVTString() const {
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return "i" + utostr(getSizeInBits());
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if (isFloatingPoint())
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return "f" + utostr(getSizeInBits());
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if (isCheriCapability())
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return "c" + utostr(getSizeInBits());
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llvm_unreachable("Invalid EVT!");
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case MVT::bf16: return "bf16";
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case MVT::ppcf128: return "ppcf128";

llvm/utils/TableGen/Basic/VTEmitter.cpp

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@@ -132,6 +132,7 @@ void VTEmitter::run(raw_ostream &OS) {
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bool IsVector = VT->getValueAsBit("isVector");
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bool IsScalable = VT->getValueAsBit("isScalable");
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bool IsRISCVVecTuple = VT->getValueAsBit("isRISCVVecTuple");
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bool IsCheriCapability = VT->getValueAsBit("isCheriCapability");
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int64_t NF = VT->getValueAsInt("NF");
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bool IsNormalValueType = VT->getValueAsBit("isNormalValueType");
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int64_t NElem = IsVector ? VT->getValueAsInt("nElem") : 0;
@@ -152,6 +153,7 @@ void VTEmitter::run(raw_ostream &OS) {
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UpdateVTRange("INTEGER_VALUETYPE", Name, IsInteger && !IsVector);
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UpdateVTRange("FP_VALUETYPE", Name, IsFP && !IsVector);
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UpdateVTRange("VALUETYPE", Name, IsNormalValueType);
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UpdateVTRange("CHERI_CAPABILITY_VALUETYPE", Name, IsCheriCapability);
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// clang-format off
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OS << " GET_VT_ATTR("

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