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EbinJose2002EbinJose2002
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[SPIRV] Frexp intrinsic implementation (#157436)
- Make use of the OpenCL extended instruction frexp. - Creates a variable and passes it to OpExtInst instruction
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‎llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp‎

Lines changed: 52 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -314,7 +314,8 @@ class SPIRVInstructionSelector : public InstructionSelector {
314314
MachineInstr &I) const;
315315
bool selectModf(Register ResVReg, const SPIRVType *ResType,
316316
MachineInstr &I) const;
317-
317+
bool selectFrexp(Register ResVReg, const SPIRVType *ResType,
318+
MachineInstr &I) const;
318319
// Utilities
319320
std::pair<Register, bool>
320321
buildI32Constant(uint32_t Val, MachineInstr &I,
@@ -835,6 +836,9 @@ bool SPIRVInstructionSelector::spvSelect(Register ResVReg,
835836
case TargetOpcode::G_USUBSAT:
836837
return selectExtInst(ResVReg, ResType, I, CL::u_sub_sat);
837838

839+
case TargetOpcode::G_FFREXP:
840+
return selectFrexp(ResVReg, ResType, I);
841+
838842
case TargetOpcode::G_UADDO:
839843
return selectOverflowArith(ResVReg, ResType, I,
840844
ResType->getOpcode() == SPIRV::OpTypeVector
@@ -1119,6 +1123,53 @@ bool SPIRVInstructionSelector::selectExtInstForLRound(
11191123
return false;
11201124
}
11211125

1126+
bool SPIRVInstructionSelector::selectFrexp(Register ResVReg,
1127+
const SPIRVType *ResType,
1128+
MachineInstr &I) const {
1129+
ExtInstList ExtInsts = {{SPIRV::InstructionSet::OpenCL_std, CL::frexp},
1130+
{SPIRV::InstructionSet::GLSL_std_450, GL::Frexp}};
1131+
for (const auto &Ex : ExtInsts) {
1132+
SPIRV::InstructionSet::InstructionSet Set = Ex.first;
1133+
uint32_t Opcode = Ex.second;
1134+
if (!STI.canUseExtInstSet(Set))
1135+
continue;
1136+
1137+
MachineIRBuilder MIRBuilder(I);
1138+
SPIRVType *PointeeTy = GR.getSPIRVTypeForVReg(I.getOperand(1).getReg());
1139+
const SPIRVType *PointerType = GR.getOrCreateSPIRVPointerType(
1140+
PointeeTy, MIRBuilder, SPIRV::StorageClass::Function);
1141+
Register PointerVReg =
1142+
createVirtualRegister(PointerType, &GR, MRI, MRI->getMF());
1143+
1144+
auto It = getOpVariableMBBIt(I);
1145+
auto MIB = BuildMI(*It->getParent(), It, It->getDebugLoc(),
1146+
TII.get(SPIRV::OpVariable))
1147+
.addDef(PointerVReg)
1148+
.addUse(GR.getSPIRVTypeID(PointerType))
1149+
.addImm(static_cast<uint32_t>(SPIRV::StorageClass::Function))
1150+
.constrainAllUses(TII, TRI, RBI);
1151+
1152+
MIB = MIB &
1153+
BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(SPIRV::OpExtInst))
1154+
.addDef(ResVReg)
1155+
.addUse(GR.getSPIRVTypeID(ResType))
1156+
.addImm(static_cast<uint32_t>(Ex.first))
1157+
.addImm(Opcode)
1158+
.add(I.getOperand(2))
1159+
.addUse(PointerVReg)
1160+
.constrainAllUses(TII, TRI, RBI);
1161+
1162+
MIB = MIB &
1163+
BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(SPIRV::OpLoad))
1164+
.addDef(I.getOperand(1).getReg())
1165+
.addUse(GR.getSPIRVTypeID(PointeeTy))
1166+
.addUse(PointerVReg)
1167+
.constrainAllUses(TII, TRI, RBI);
1168+
return MIB;
1169+
}
1170+
return false;
1171+
}
1172+
11221173
bool SPIRVInstructionSelector::selectOpWithSrcs(Register ResVReg,
11231174
const SPIRVType *ResType,
11241175
MachineInstr &I,

‎llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp‎

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -290,6 +290,9 @@ SPIRVLegalizerInfo::SPIRVLegalizerInfo(const SPIRVSubtarget &ST) {
290290
// Control-flow. In some cases (e.g. constants) s1 may be promoted to s32.
291291
getActionDefinitionsBuilder(G_BRCOND).legalFor({s1, s32});
292292

293+
getActionDefinitionsBuilder(G_FFREXP).legalForCartesianProduct(
294+
allFloatScalarsAndVectors, {s32, v2s32, v3s32, v4s32, v8s32, v16s32});
295+
293296
// TODO: Review the target OpenCL and GLSL Extended Instruction Set specs to
294297
// tighten these requirements. Many of these math functions are only legal on
295298
// specific bitwidths, so they are not selectable for

‎llvm/test/CodeGen/SPIRV/llvm-intrinsics/frexp.ll‎

Lines changed: 114 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,114 @@
1+
; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s
2+
; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}
3+
4+
; CHECK-DAG: %[[#extinst_id:]] = OpExtInstImport "OpenCL.std"
5+
; CHECK-DAG: %[[#float_32_type:]] = OpTypeFloat 32
6+
; CHECK-DAG: %[[#int_32_type:]] = OpTypeInt 32 0
7+
; CHECK-DAG: %[[#fn_ptr_type_i32:]] = OpTypePointer Function %[[#int_32_type]]
8+
; CHECK-DAG: %[[#const_negzero:]] = OpConstant %[[#float_32_type]] -0
9+
; CHECK-DAG: %[[#vec2_float_type:]] = OpTypeVector %[[#float_32_type]] 2
10+
; CHECK-DAG: %[[#vec2_int_type:]] = OpTypeVector %[[#int_32_type]] 2
11+
; CHECK-DAG: %[[#fn_ptr_type_vec2_i32:]] = OpTypePointer Function %[[#vec2_int_type]]
12+
; CHECK-DAG: %[[#vec2_null:]] = OpConstantNull %[[#vec2_float_type]]
13+
; CHECK-DAG: %[[#scalar_null:]] = OpConstantNull %[[#float_32_type]]
14+
; CHECK-DAG: %[[#const_composite1:]] = OpConstantComposite %[[#vec2_float_type]] %[[#scalar_null]] %[[#const_negzero]]
15+
; CHECK-DAG: %[[#vec4_float_type:]] = OpTypeVector %[[#float_32_type]] 4
16+
; CHECK-DAG: %[[#vec4_int_type:]] = OpTypeVector %[[#int_32_type]] 4
17+
; CHECK-DAG: %[[#fn_ptr_type_vec4_i32:]] = OpTypePointer Function %[[#vec4_int_type]]
18+
; CHECK-DAG: %[[#const_composite2:]] = OpConstantComposite %[[#vec4_float_type]] %[[#const_16:]] %[[#const_neg32:]] %[[#const_0:]] %[[#const_9999:]]
19+
; CHECK-DAG: %[[#float_64_type:]] = OpTypeFloat 64
20+
; CHECK-DAG: %[[#vec2_double_type:]] = OpTypeVector %[[#float_64_type]] 2
21+
22+
; CHECK: %[[#]] = OpFunctionParameter %[[#float_32_type]]
23+
; CHECK: %[[#var1:]] = OpVariable %[[#fn_ptr_type_i32]] Function
24+
; CHECK: %[[#extinst1:]] = OpExtInst %[[#float_32_type]] %[[#extinst_id]] frexp %[[#const_negzero]] %[[#var1]]
25+
; CHECK: %[[#exp_part_var:]] = OpLoad %[[#int_32_type]] %[[#var1]]
26+
; CHECK: OpReturnValue %[[#exp_part_var]]
27+
define i32 @frexp_negzero(float %x) {
28+
%ret = call { float, i32 } @llvm.frexp.f32.i32(float -0.0)
29+
%f_part = extractvalue { float, i32 } %ret, 0
30+
%exp_part = extractvalue { float, i32 } %ret, 1
31+
ret i32 %exp_part
32+
}
33+
34+
; CHECK: %[[#x_var4:]] = OpFunctionParameter %[[#float_32_type]]
35+
; CHECK: %[[#var10:]] = OpVariable %[[#fn_ptr_type_i32]] Function
36+
; CHECK: %[[#extinst10:]] = OpExtInst %[[#float_32_type]] %[[#extinst_id]] frexp %[[#x_var4]] %[[#var10]]
37+
; CHECK: %[[#exp_part_var2:]] = OpLoad %[[#int_32_type]] %[[#var10]]
38+
; CHECK: OpReturnValue %[[#exp_part_var2]]
39+
define i32 @frexp_frexp_get_int(float %x) {
40+
%frexp0 = call { float, i32 } @llvm.frexp.f32.i32(float %x)
41+
%f_part = extractvalue { float, i32 } %frexp0, 0
42+
%exp_part = extractvalue { float, i32 } %frexp0, 1
43+
ret i32 %exp_part
44+
}
45+
46+
; CHECK: %[[#var3:]] = OpVariable %[[#fn_ptr_type_vec2_i32]] Function
47+
; CHECK: %[[#extinst3:]] = OpExtInst %[[#vec2_float_type]] %[[#extinst_id]] frexp %[[#vec2_null]] %[[#var3]]
48+
; CHECK: %[[#f_part_var2:]] = OpLoad %[[#vec2_int_type]] %[[#var3]]
49+
; CHECK: OpReturnValue %[[#extinst3]]
50+
define <2 x float> @frexp_zero_vector() {
51+
%ret = call { <2 x float>, <2 x i32> } @llvm.frexp.v2f32.v2i32(<2 x float> zeroinitializer)
52+
%f_part = extractvalue { <2 x float>, <2 x i32> } %ret, 0
53+
%exp_part = extractvalue { <2 x float>, <2 x i32> } %ret, 1
54+
ret <2 x float> %f_part
55+
}
56+
57+
; CHECK: %[[#var4:]] = OpVariable %[[#fn_ptr_type_vec2_i32]] Function
58+
; CHECK: %[[#extinst4:]] = OpExtInst %[[#vec2_float_type]] %[[#extinst_id]] frexp %[[#const_composite1]] %[[#var4]]
59+
; CHECK: %[[#f_part_var3:]] = OpLoad %[[#vec2_int_type]] %[[#var4]]
60+
; CHECK: OpReturnValue %[[#extinst4]]
61+
define <2 x float> @frexp_zero_negzero_vector() {
62+
%ret = call { <2 x float>, <2 x i32> } @llvm.frexp.v2f32.v2i32(<2 x float> <float 0.0, float -0.0>)
63+
%f_part = extractvalue { <2 x float>, <2 x i32> } %ret, 0
64+
%exp_part = extractvalue { <2 x float>, <2 x i32> } %ret, 1
65+
ret <2 x float> %f_part
66+
}
67+
68+
; CHECK: %[[#var5:]] = OpVariable %[[#fn_ptr_type_vec4_i32]] Function
69+
; CHECK: %[[#extinst5:]] = OpExtInst %[[#vec4_float_type]] %[[#extinst_id]] frexp %[[#const_composite2]] %[[#var5]]
70+
; CHECK: %[[#f_part_var4:]] = OpLoad %[[#vec4_int_type]] %[[#var5]]
71+
; CHECK: OpReturnValue %[[#extinst5]]
72+
define <4 x float> @frexp_nonsplat_vector() {
73+
%ret = call { <4 x float>, <4 x i32> } @llvm.frexp.v4f32.v4i32(<4 x float> <float 16.0, float -32.0, float 0.0, float 9999.0>)
74+
%f_part = extractvalue { <4 x float>, <4 x i32> } %ret, 0
75+
%exp_part = extractvalue { <4 x float>, <4 x i32> } %ret, 1
76+
ret <4 x float> %f_part
77+
}
78+
79+
; CHECK: %[[#x_var2:]] = OpFunctionParameter %[[#float_32_type]]
80+
; CHECK: %[[#var6:]] = OpVariable %[[#fn_ptr_type_i32]] Function
81+
; CHECK: %[[#var7:]] = OpVariable %[[#fn_ptr_type_i32]] Function
82+
; CHECK: %[[#extinst6:]] = OpExtInst %[[#float_32_type]] %[[#extinst_id]] frexp %[[#x_var2]] %[[#var6]]
83+
; CHECK: %[[#load1:]] = OpLoad %[[#int_32_type]] %[[#var6]]
84+
; CHECK: %[[#extinst7:]] = OpExtInst %[[#float_32_type]] %[[#extinst_id]] frexp %[[#extinst6]] %[[#var7]]
85+
; CHECK: %[[#f_part_var5:]] = OpLoad %[[#int_32_type]] %[[#var7]]
86+
; CHECK: OpReturnValue %[[#extinst7]]
87+
define float @frexp_frexp(float %x) {
88+
%frexp0 = call { float, i32 } @llvm.frexp.f32.i32(float %x)
89+
%frexp0_f_part = extractvalue { float, i32 } %frexp0, 0
90+
%frexp0_exp_part = extractvalue { float, i32 } %frexp0, 1
91+
%frexp1 = call { float, i32 } @llvm.frexp.f32.i32(float %frexp0_f_part)
92+
%frexp1_f_part = extractvalue { float, i32 } %frexp1, 0
93+
%frexp1_exp_part = extractvalue { float, i32 } %frexp1, 1
94+
ret float %frexp1_f_part
95+
}
96+
97+
; CHECK: %[[#x_var3:]] = OpFunctionParameter %[[#vec2_double_type]]
98+
; CHECK: %[[#var9:]] = OpVariable %[[#fn_ptr_type_vec2_i32]] Function
99+
; CHECK: %[[#extinst9:]] = OpExtInst %[[#vec2_double_type]] %[[#extinst_id]] frexp %[[#x_var3]] %[[#var9]]
100+
; CHECK: %[[#f_part_var6:]] = OpLoad %[[#vec2_int_type]] %[[#var9]]
101+
; CHECK: OpReturnValue %[[#extinst9]]
102+
define <2 x double> @frexp_frexp_vector(<2 x double> %x) {
103+
%frexp0 = call { <2 x double>, <2 x i32> } @llvm.frexp.v2f64.v2i32(<2 x double> %x)
104+
%f_part = extractvalue { <2 x double>, <2 x i32> } %frexp0, 0
105+
%exp_part = extractvalue { <2 x double>, <2 x i32> } %frexp0, 1
106+
ret <2 x double> %f_part
107+
}
108+
109+
declare { float, i32 } @llvm.frexp.f32.i32(float)
110+
declare { double, i32 } @llvm.frexp.f64.i32(double)
111+
declare { <2 x float>, <2 x i32> } @llvm.frexp.v2f32.v2i32(<2 x float>)
112+
declare { <4 x float>, <4 x i32> } @llvm.frexp.v4f32.v4i32(<4 x float>)
113+
declare { <2 x double>, <2 x i32> } @llvm.frexp.v2f64.v2i32(<2 x double>)
114+
declare { float, i8 } @llvm.frexp.f32.i8(float)

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