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[SVE] Ignore scalable vectors in InterleavedLoadCombinePass
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I have changed the pass so that we ignore shuffle vectors with
scalable vector types, and replaced VectorType with FixedVectorType
in the rest of the pass. I couldn't think of an easy way to test
this change, since for scalable vectors we shouldn't be using
shufflevectors for interleaving. This change fixes up some
type size assert warnings I found in the following test:

  CodeGen/AArch64/sve-intrinsics-int-arith-imm.ll

Differential Revision: https://reviews.llvm.org/D79700
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david-arm committed May 18, 2020
1 parent 10e2e7d commit 364c595
Showing 1 changed file with 10 additions and 7 deletions.
17 changes: 10 additions & 7 deletions llvm/lib/CodeGen/InterleavedLoadCombinePass.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -673,9 +673,9 @@ struct VectorInfo {
ElementInfo *EI;

/// Vector Type
VectorType *const VTy;
FixedVectorType *const VTy;

VectorInfo(VectorType *VTy)
VectorInfo(FixedVectorType *VTy)
: BB(nullptr), PV(nullptr), LIs(), Is(), SVI(nullptr), VTy(VTy) {
EI = new ElementInfo[VTy->getNumElements()];
}
Expand Down Expand Up @@ -735,7 +735,7 @@ struct VectorInfo {
if (!Op)
return false;

VectorType *VTy = dyn_cast<VectorType>(Op->getType());
FixedVectorType *VTy = dyn_cast<FixedVectorType>(Op->getType());
if (!VTy)
return false;

Expand Down Expand Up @@ -785,8 +785,8 @@ struct VectorInfo {
/// \returns false if no sensible information can be gathered.
static bool computeFromSVI(ShuffleVectorInst *SVI, VectorInfo &Result,
const DataLayout &DL) {
VectorType *ArgTy = dyn_cast<VectorType>(SVI->getOperand(0)->getType());
assert(ArgTy && "ShuffleVector Operand is not a VectorType");
FixedVectorType *ArgTy =
cast<FixedVectorType>(SVI->getOperand(0)->getType());

// Compute the left hand vector information.
VectorInfo LHS(ArgTy);
Expand Down Expand Up @@ -1201,7 +1201,7 @@ bool InterleavedLoadCombineImpl::combine(std::list<VectorInfo> &InterleavedLoad,
Type *ETy = InterleavedLoad.front().SVI->getType()->getElementType();
unsigned ElementsPerSVI =
InterleavedLoad.front().SVI->getType()->getNumElements();
VectorType *ILTy = VectorType::get(ETy, Factor * ElementsPerSVI);
FixedVectorType *ILTy = FixedVectorType::get(ETy, Factor * ElementsPerSVI);

SmallVector<unsigned, 4> Indices;
for (unsigned i = 0; i < Factor; i++)
Expand Down Expand Up @@ -1265,8 +1265,11 @@ bool InterleavedLoadCombineImpl::run() {
for (BasicBlock &BB : F) {
for (Instruction &I : BB) {
if (auto SVI = dyn_cast<ShuffleVectorInst>(&I)) {
// We don't support scalable vectors in this pass.
if (isa<ScalableVectorType>(SVI->getType()))
continue;

Candidates.emplace_back(SVI->getType());
Candidates.emplace_back(cast<FixedVectorType>(SVI->getType()));

if (!VectorInfo::computeFromSVI(SVI, Candidates.back(), DL)) {
Candidates.pop_back();
Expand Down

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