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Reland "[SelectionDAG] Introducing a new ISD::POISON SDNode to represent the poison value in the IR." (#135056)
A new ISD::POISON SDNode is introduced to represent the poison value in the IR, replacing the previous use of ISD::UNDEF
1 parent 3097ab0 commit 378ac57

17 files changed

+111
-38
lines changed

‎llvm/include/llvm/CodeGen/ISDOpcodes.h‎

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -217,6 +217,9 @@ enum NodeType {
217217
/// UNDEF - An undefined node.
218218
UNDEF,
219219

220+
/// POISON - A poison node.
221+
POISON,
222+
220223
/// FREEZE - FREEZE(VAL) returns an arbitrary value if VAL is UNDEF (or
221224
/// is evaluated to UNDEF), or returns VAL otherwise. Note that each
222225
/// read of UNDEF can yield different value, but FREEZE(UNDEF) cannot.

‎llvm/include/llvm/CodeGen/SelectionDAG.h‎

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1130,6 +1130,9 @@ class SelectionDAG {
11301130
return getNode(ISD::UNDEF, SDLoc(), VT);
11311131
}
11321132

1133+
/// Return a POISON node. POISON does not have a useful SDLoc.
1134+
SDValue getPOISON(EVT VT) { return getNode(ISD::POISON, SDLoc(), VT); }
1135+
11331136
/// Return a node that represents the runtime scaling 'MulImm * RuntimeVL'.
11341137
SDValue getVScale(const SDLoc &DL, EVT VT, APInt MulImm,
11351138
bool ConstantFold = true);

‎llvm/include/llvm/CodeGen/SelectionDAGNodes.h‎

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -692,8 +692,10 @@ END_TWO_BYTE_PACK()
692692
/// \<target\>ISD namespace).
693693
bool isTargetOpcode() const { return NodeType >= ISD::BUILTIN_OP_END; }
694694

695-
/// Return true if the type of the node type undefined.
696-
bool isUndef() const { return NodeType == ISD::UNDEF; }
695+
/// Returns true if the node type is UNDEF or POISON.
696+
bool isUndef() const {
697+
return NodeType == ISD::UNDEF || NodeType == ISD::POISON;
698+
}
697699

698700
/// Test if this node is a memory intrinsic (with valid pointer information).
699701
bool isMemIntrinsic() const { return SDNodeBits.IsMemIntrinsic; }

‎llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -16304,7 +16304,8 @@ SDValue DAGCombiner::visitFREEZE(SDNode *N) {
1630416304
// Finally, recreate the node, it's operands were updated to use
1630516305
// frozen operands, so we just need to use it's "original" operands.
1630616306
SmallVector<SDValue> Ops(N0->ops());
16307-
// Special-handle ISD::UNDEF, each single one of them can be it's own thing.
16307+
// TODO: ISD::UNDEF and ISD::POISON should get separate handling, but best
16308+
// leave for a future patch.
1630816309
for (SDValue &Op : Ops) {
1630916310
if (Op.isUndef())
1631016311
Op = DAG.getFreeze(Op);

‎llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp‎

Lines changed: 14 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -986,6 +986,19 @@ void SelectionDAGLegalize::LegalizeOp(SDNode *Node) {
986986
TargetLowering::LegalizeAction Action = TargetLowering::Legal;
987987
bool SimpleFinishLegalizing = true;
988988
switch (Node->getOpcode()) {
989+
// TODO: Currently, POISON is being lowered to UNDEF here. However, there is
990+
// an open concern that this transformation may not be ideal, as targets
991+
// should ideally handle POISON directly. Changing this behavior would require
992+
// adding support for POISON in TableGen, which is a large change.
993+
// Additionally, many existing test cases rely on the current behavior (e.g.,
994+
// llvm/test/CodeGen/PowerPC/vec_shuffle.ll). A broader discussion and
995+
// incremental changes might be needed to properly
996+
// support POISON without breaking existing targets and tests.
997+
case ISD::POISON: {
998+
SDValue UndefNode = DAG.getUNDEF(Node->getValueType(0));
999+
ReplaceNode(Node, UndefNode.getNode());
1000+
break;
1001+
}
9891002
case ISD::INTRINSIC_W_CHAIN:
9901003
case ISD::INTRINSIC_WO_CHAIN:
9911004
case ISD::INTRINSIC_VOID:
@@ -3169,6 +3182,7 @@ bool SelectionDAGLegalize::ExpandNode(SDNode *Node) {
31693182
for (unsigned i = 0; i < Node->getNumValues(); i++)
31703183
Results.push_back(Node->getOperand(i));
31713184
break;
3185+
case ISD::POISON:
31723186
case ISD::UNDEF: {
31733187
EVT VT = Node->getValueType(0);
31743188
if (VT.isInteger())

‎llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp‎

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -165,6 +165,7 @@ void DAGTypeLegalizer::SoftenFloatResult(SDNode *N, unsigned ResNo) {
165165
case ISD::STRICT_UINT_TO_FP:
166166
case ISD::SINT_TO_FP:
167167
case ISD::UINT_TO_FP: R = SoftenFloatRes_XINT_TO_FP(N); break;
168+
case ISD::POISON:
168169
case ISD::UNDEF: R = SoftenFloatRes_UNDEF(N); break;
169170
case ISD::VAARG: R = SoftenFloatRes_VAARG(N); break;
170171
case ISD::VECREDUCE_FADD:
@@ -1501,6 +1502,7 @@ void DAGTypeLegalizer::ExpandFloatResult(SDNode *N, unsigned ResNo) {
15011502
report_fatal_error("Do not know how to expand the result of this "
15021503
"operator!");
15031504
// clang-format off
1505+
case ISD::POISON:
15041506
case ISD::UNDEF: SplitRes_UNDEF(N, Lo, Hi); break;
15051507
case ISD::SELECT: SplitRes_Select(N, Lo, Hi); break;
15061508
case ISD::SELECT_CC: SplitRes_SELECT_CC(N, Lo, Hi); break;
@@ -2845,6 +2847,7 @@ void DAGTypeLegalizer::PromoteFloatResult(SDNode *N, unsigned ResNo) {
28452847

28462848
case ISD::SINT_TO_FP:
28472849
case ISD::UINT_TO_FP: R = PromoteFloatRes_XINT_TO_FP(N); break;
2850+
case ISD::POISON:
28482851
case ISD::UNDEF: R = PromoteFloatRes_UNDEF(N); break;
28492852
case ISD::ATOMIC_SWAP: R = BitcastToInt_ATOMIC_SWAP(N); break;
28502853
case ISD::VECREDUCE_FADD:
@@ -3318,6 +3321,7 @@ void DAGTypeLegalizer::SoftPromoteHalfResult(SDNode *N, unsigned ResNo) {
33183321
case ISD::STRICT_UINT_TO_FP:
33193322
case ISD::SINT_TO_FP:
33203323
case ISD::UINT_TO_FP: R = SoftPromoteHalfRes_XINT_TO_FP(N); break;
3324+
case ISD::POISON:
33213325
case ISD::UNDEF: R = SoftPromoteHalfRes_UNDEF(N); break;
33223326
case ISD::ATOMIC_SWAP: R = BitcastToInt_ATOMIC_SWAP(N); break;
33233327
case ISD::VECREDUCE_FADD:

‎llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -118,6 +118,7 @@ void DAGTypeLegalizer::PromoteIntegerResult(SDNode *N, unsigned ResNo) {
118118
case ISD::VP_SRL: Res = PromoteIntRes_SRL(N); break;
119119
case ISD::VP_TRUNCATE:
120120
case ISD::TRUNCATE: Res = PromoteIntRes_TRUNCATE(N); break;
121+
case ISD::POISON:
121122
case ISD::UNDEF: Res = PromoteIntRes_UNDEF(N); break;
122123
case ISD::VAARG: Res = PromoteIntRes_VAARG(N); break;
123124
case ISD::VSCALE: Res = PromoteIntRes_VSCALE(N); break;
@@ -2914,6 +2915,7 @@ void DAGTypeLegalizer::ExpandIntegerResult(SDNode *N, unsigned ResNo) {
29142915
case ISD::MERGE_VALUES: SplitRes_MERGE_VALUES(N, ResNo, Lo, Hi); break;
29152916
case ISD::SELECT: SplitRes_Select(N, Lo, Hi); break;
29162917
case ISD::SELECT_CC: SplitRes_SELECT_CC(N, Lo, Hi); break;
2918+
case ISD::POISON:
29172919
case ISD::UNDEF: SplitRes_UNDEF(N, Lo, Hi); break;
29182920
case ISD::FREEZE: SplitRes_FREEZE(N, Lo, Hi); break;
29192921
case ISD::SETCC: ExpandIntRes_SETCC(N, Lo, Hi); break;

‎llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp‎

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -71,6 +71,7 @@ void DAGTypeLegalizer::ScalarizeVectorResult(SDNode *N, unsigned ResNo) {
7171
case ISD::SELECT: R = ScalarizeVecRes_SELECT(N); break;
7272
case ISD::SELECT_CC: R = ScalarizeVecRes_SELECT_CC(N); break;
7373
case ISD::SETCC: R = ScalarizeVecRes_SETCC(N); break;
74+
case ISD::POISON:
7475
case ISD::UNDEF: R = ScalarizeVecRes_UNDEF(N); break;
7576
case ISD::VECTOR_SHUFFLE: R = ScalarizeVecRes_VECTOR_SHUFFLE(N); break;
7677
case ISD::IS_FPCLASS: R = ScalarizeVecRes_IS_FPCLASS(N); break;
@@ -1137,6 +1138,7 @@ void DAGTypeLegalizer::SplitVectorResult(SDNode *N, unsigned ResNo) {
11371138
case ISD::VP_MERGE:
11381139
case ISD::VP_SELECT: SplitRes_Select(N, Lo, Hi); break;
11391140
case ISD::SELECT_CC: SplitRes_SELECT_CC(N, Lo, Hi); break;
1141+
case ISD::POISON:
11401142
case ISD::UNDEF: SplitRes_UNDEF(N, Lo, Hi); break;
11411143
case ISD::BITCAST: SplitVecRes_BITCAST(N, Lo, Hi); break;
11421144
case ISD::BUILD_VECTOR: SplitVecRes_BUILD_VECTOR(N, Lo, Hi); break;
@@ -4592,6 +4594,7 @@ void DAGTypeLegalizer::WidenVectorResult(SDNode *N, unsigned ResNo) {
45924594
case ISD::SELECT_CC: Res = WidenVecRes_SELECT_CC(N); break;
45934595
case ISD::VP_SETCC:
45944596
case ISD::SETCC: Res = WidenVecRes_SETCC(N); break;
4597+
case ISD::POISON:
45954598
case ISD::UNDEF: Res = WidenVecRes_UNDEF(N); break;
45964599
case ISD::VECTOR_SHUFFLE:
45974600
Res = WidenVecRes_VECTOR_SHUFFLE(cast<ShuffleVectorSDNode>(N));

‎llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp‎

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -5387,6 +5387,9 @@ bool SelectionDAG::isGuaranteedNotToBeUndefOrPoison(SDValue Op,
53875387
case ISD::CopyFromReg:
53885388
return true;
53895389

5390+
case ISD::POISON:
5391+
return false;
5392+
53905393
case ISD::UNDEF:
53915394
return PoisonOnly;
53925395

‎llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1817,7 +1817,7 @@ SDValue SelectionDAGBuilder::getValueImpl(const Value *V) {
18171817
return DAG.getConstantFP(*CFP, getCurSDLoc(), VT);
18181818

18191819
if (isa<UndefValue>(C) && !V->getType()->isAggregateType())
1820-
return DAG.getUNDEF(VT);
1820+
return isa<PoisonValue>(C) ? DAG.getPOISON(VT) : DAG.getUNDEF(VT);
18211821

18221822
if (const ConstantExpr *CE = dyn_cast<ConstantExpr>(C)) {
18231823
visit(CE->getOpcode(), *CE);

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