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[InstCombine] combineLoadToOperationType(): don't fold int<->ptr cast into load
And another step towards transforms not introducing inttoptr and/or ptrtoint casts that weren't there already. As we've been establishing (see D88788/D88789), if there is a int<->ptr cast, it basically must stay as-is, we can't do much with it. I've looked, and the most source of new such casts being introduces, as far as i can tell, is this transform, which, ironically, tries to reduce count of casts.. On vanilla llvm test-suite + RawSpeed, @ `-O3`, this results in -33.58% less `IntToPtr`s (19014 -> 12629) and +76.20% more `PtrToInt`s (18589 -> 32753), which is an increase of +20.69% in total. However just on RawSpeed, where i know there are basically none `IntToPtr` in the original source code, this results in -99.27% less `IntToPtr`s (2724 -> 20) and +82.92% more `PtrToInt`s (4513 -> 8255). which is again an increase of 14.34% in total. To me this does seem like the step in the right direction, we end up with strictly less `IntToPtr`, but strictly more `PtrToInt`, which seems like a reasonable trade-off. See https://reviews.llvm.org/D88860 / https://reviews.llvm.org/D88995 for some more discussion on the subject. (Eventually, `CastInst::isNoopCast()`/`CastInst::isEliminableCastPair` should be taught about this, yes) Reviewed By: nlopes, nikic Differential Revision: https://reviews.llvm.org/D88979
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7 files changed

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‎clang/test/CodeGen/arm64_32-vaarg.c

Lines changed: 14 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -27,20 +27,20 @@ typedef struct {
2727

2828
// Minimum slot size is 4 bytes, so address needs rounding up to multiple of 8.
2929
long long test_longlong(OneLongLong input, va_list *mylist) {
30-
// CHECK-LABEL: define i64 @test_longlong(i64 %input
31-
// CHECK: [[STARTPTR:%.*]] = bitcast i8** %mylist to i32*
32-
// CHECK: [[START:%.*]] = load i32, i32* [[STARTPTR]]
33-
34-
// CHECK: [[ALIGN_TMP:%.*]] = add i32 [[START]], 7
35-
// CHECK: [[ALIGNED:%.*]] = and i32 [[ALIGN_TMP]], -8
36-
// CHECK: [[ALIGNED_ADDR:%.*]] = inttoptr i32 [[ALIGNED]] to i8*
37-
// CHECK: [[NEXT:%.*]] = getelementptr inbounds i8, i8* [[ALIGNED_ADDR]], i32 8
38-
// CHECK: store i8* [[NEXT]], i8** %mylist
39-
40-
// CHECK: [[ADDR_STRUCT:%.*]] = inttoptr i32 [[ALIGNED]] to %struct.OneLongLong*
41-
// CHECK: [[ADDR_I64:%.*]] = getelementptr inbounds %struct.OneLongLong, %struct.OneLongLong* [[ADDR_STRUCT]], i32 0, i32 0
42-
// CHECK: [[RES:%.*]] = load i64, i64* [[ADDR_I64]]
43-
// CHECK: ret i64 [[RES]]
30+
// CHECK-LABEL: define i64 @test_longlong(i64 %input
31+
// CHECK: [[STARTPTR:%.*]] = load i8*, i8** %mylist
32+
// CHECK: [[START:%.*]] = ptrtoint i8* [[STARTPTR]] to i32
33+
34+
// CHECK: [[ALIGN_TMP:%.*]] = add i32 [[START]], 7
35+
// CHECK: [[ALIGNED:%.*]] = and i32 [[ALIGN_TMP]], -8
36+
// CHECK: [[ALIGNED_ADDR:%.*]] = inttoptr i32 [[ALIGNED]] to i8*
37+
// CHECK: [[NEXT:%.*]] = getelementptr inbounds i8, i8* [[ALIGNED_ADDR]], i32 8
38+
// CHECK: store i8* [[NEXT]], i8** %mylist
39+
40+
// CHECK: [[ADDR_STRUCT:%.*]] = inttoptr i32 [[ALIGNED]] to %struct.OneLongLong*
41+
// CHECK: [[ADDR_I64:%.*]] = getelementptr inbounds %struct.OneLongLong, %struct.OneLongLong* [[ADDR_STRUCT]], i32 0, i32 0
42+
// CHECK: [[RES:%.*]] = load i64, i64* [[ADDR_I64]]
43+
// CHECK: ret i64 [[RES]]
4444

4545
return va_arg(*mylist, OneLongLong).a;
4646
}

‎llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -557,12 +557,12 @@ static Instruction *combineLoadToOperationType(InstCombinerImpl &IC,
557557
const DataLayout &DL = IC.getDataLayout();
558558

559559
// Fold away bit casts of the loaded value by loading the desired type.
560-
// We can do this for BitCastInsts as well as casts from and to pointer types,
561-
// as long as those are noops (i.e., the source or dest type have the same
562-
// bitwidth as the target's pointers).
560+
// Note that we should not do this for pointer<->integer casts,
561+
// because that would result in type punning.
563562
if (LI.hasOneUse())
564563
if (auto* CI = dyn_cast<CastInst>(LI.user_back()))
565-
if (CI->isNoopCast(DL))
564+
if (CI->isNoopCast(DL) && LI.getType()->isPtrOrPtrVectorTy() ==
565+
CI->getDestTy()->isPtrOrPtrVectorTy())
566566
if (!LI.isAtomic() || isSupportedAtomicType(CI->getDestTy())) {
567567
LoadInst *NewLoad = IC.combineLoadToNewType(LI, CI->getDestTy());
568568
CI->replaceAllUsesWith(NewLoad);

‎llvm/test/Transforms/InstCombine/PR30597.ll

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -23,9 +23,9 @@ entry-block:
2323
define i64* @function(i64* noalias nocapture readonly dereferenceable(8)) {
2424
; CHECK-LABEL: @function(
2525
; CHECK-NEXT: entry-block:
26-
; CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[TMP0:%.*]] to i64**
27-
; CHECK-NEXT: [[LOADED1:%.*]] = load i64*, i64** [[TMP1]], align 8, !nonnull !0
28-
; CHECK-NEXT: ret i64* [[LOADED1]]
26+
; CHECK-NEXT: [[LOADED:%.*]] = load i64, i64* [[TMP0:%.*]], align 8, [[RNG0:!range !.*]]
27+
; CHECK-NEXT: [[INTTOPTR:%.*]] = inttoptr i64 [[LOADED]] to i64*
28+
; CHECK-NEXT: ret i64* [[INTTOPTR]]
2929
;
3030
entry-block:
3131
%loaded = load i64, i64* %0, align 8, !range !1

‎llvm/test/Transforms/InstCombine/intptr1.ll

Lines changed: 15 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -7,12 +7,12 @@ define void @test1(float* %a, float* readnone %a_end, i64* %b.i64) {
77
; CHECK-NEXT: [[CMP1:%.*]] = icmp ult float* [[A:%.*]], [[A_END:%.*]]
88
; CHECK-NEXT: br i1 [[CMP1]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_END:%.*]]
99
; CHECK: for.body.preheader:
10-
; CHECK-NEXT: [[TMP0:%.*]] = bitcast i64* [[B_I64:%.*]] to float**
11-
; CHECK-NEXT: [[B1:%.*]] = load float*, float** [[TMP0]], align 8
10+
; CHECK-NEXT: [[B:%.*]] = load i64, i64* [[B_I64:%.*]], align 8
11+
; CHECK-NEXT: [[B_PTR:%.*]] = inttoptr i64 [[B]] to float*
1212
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
1313
; CHECK: for.body:
1414
; CHECK-NEXT: [[A_ADDR_03:%.*]] = phi float* [ [[INCDEC_PTR:%.*]], [[FOR_BODY]] ], [ [[A]], [[FOR_BODY_PREHEADER]] ]
15-
; CHECK-NEXT: [[B_ADDR_02_PTR:%.*]] = phi float* [ [[ADD:%.*]], [[FOR_BODY]] ], [ [[B1]], [[FOR_BODY_PREHEADER]] ]
15+
; CHECK-NEXT: [[B_ADDR_02_PTR:%.*]] = phi float* [ [[ADD:%.*]], [[FOR_BODY]] ], [ [[B_PTR]], [[FOR_BODY_PREHEADER]] ]
1616
; CHECK-NEXT: [[TMP1:%.*]] = load float, float* [[B_ADDR_02_PTR]], align 4
1717
; CHECK-NEXT: [[MUL_I:%.*]] = fmul float [[TMP1]], 4.200000e+01
1818
; CHECK-NEXT: store float [[MUL_I]], float* [[A_ADDR_03]], align 4
@@ -114,11 +114,13 @@ define void @test2(float* %a, float* readnone %a_end, float** %b.float) {
114114
; CHECK-NEXT: [[CMP1:%.*]] = icmp ult float* [[A:%.*]], [[A_END:%.*]]
115115
; CHECK-NEXT: br i1 [[CMP1]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_END:%.*]]
116116
; CHECK: for.body.preheader:
117-
; CHECK-NEXT: [[B1:%.*]] = load float*, float** [[B_FLOAT:%.*]], align 8
117+
; CHECK-NEXT: [[B_I64:%.*]] = bitcast float** [[B_FLOAT:%.*]] to i64*
118+
; CHECK-NEXT: [[B:%.*]] = load i64, i64* [[B_I64]], align 8
119+
; CHECK-NEXT: [[B_PTR:%.*]] = inttoptr i64 [[B]] to float*
118120
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
119121
; CHECK: for.body:
120122
; CHECK-NEXT: [[A_ADDR_03:%.*]] = phi float* [ [[INCDEC_PTR:%.*]], [[FOR_BODY]] ], [ [[A]], [[FOR_BODY_PREHEADER]] ]
121-
; CHECK-NEXT: [[B_ADDR_02_PTR:%.*]] = phi float* [ [[ADD:%.*]], [[FOR_BODY]] ], [ [[B1]], [[FOR_BODY_PREHEADER]] ]
123+
; CHECK-NEXT: [[B_ADDR_02_PTR:%.*]] = phi float* [ [[ADD:%.*]], [[FOR_BODY]] ], [ [[B_PTR]], [[FOR_BODY_PREHEADER]] ]
122124
; CHECK-NEXT: [[TMP1:%.*]] = load float, float* [[B_ADDR_02_PTR]], align 4
123125
; CHECK-NEXT: [[MUL_I:%.*]] = fmul float [[TMP1]], 4.200000e+01
124126
; CHECK-NEXT: store float [[MUL_I]], float* [[A_ADDR_03]], align 4
@@ -164,12 +166,13 @@ define void @test3(float* %a, float* readnone %a_end, i8** %b.i8p) {
164166
; CHECK-NEXT: [[CMP1:%.*]] = icmp ult float* [[A:%.*]], [[A_END:%.*]]
165167
; CHECK-NEXT: br i1 [[CMP1]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_END:%.*]]
166168
; CHECK: for.body.preheader:
167-
; CHECK-NEXT: [[TMP0:%.*]] = bitcast i8** [[B_I8P:%.*]] to float**
168-
; CHECK-NEXT: [[B1:%.*]] = load float*, float** [[TMP0]], align 8
169+
; CHECK-NEXT: [[B_I64:%.*]] = bitcast i8** [[B_I8P:%.*]] to i64*
170+
; CHECK-NEXT: [[B:%.*]] = load i64, i64* [[B_I64]], align 8
171+
; CHECK-NEXT: [[B_PTR:%.*]] = inttoptr i64 [[B]] to float*
169172
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
170173
; CHECK: for.body:
171174
; CHECK-NEXT: [[A_ADDR_03:%.*]] = phi float* [ [[INCDEC_PTR:%.*]], [[FOR_BODY]] ], [ [[A]], [[FOR_BODY_PREHEADER]] ]
172-
; CHECK-NEXT: [[B_ADDR_02_PTR:%.*]] = phi float* [ [[ADD:%.*]], [[FOR_BODY]] ], [ [[B1]], [[FOR_BODY_PREHEADER]] ]
175+
; CHECK-NEXT: [[B_ADDR_02_PTR:%.*]] = phi float* [ [[ADD:%.*]], [[FOR_BODY]] ], [ [[B_PTR]], [[FOR_BODY_PREHEADER]] ]
173176
; CHECK-NEXT: [[TMP1:%.*]] = load float, float* [[B_ADDR_02_PTR]], align 4
174177
; CHECK-NEXT: [[MUL_I:%.*]] = fmul float [[TMP1]], 4.200000e+01
175178
; CHECK-NEXT: store float [[MUL_I]], float* [[A_ADDR_03]], align 4
@@ -215,15 +218,15 @@ define void @test4(float* %a, float* readnone %a_end, float** %b.float) {
215218
; CHECK-NEXT: [[CMP1:%.*]] = icmp ult float* [[A:%.*]], [[A_END:%.*]]
216219
; CHECK-NEXT: br i1 [[CMP1]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_END:%.*]]
217220
; CHECK: for.body.preheader:
218-
; CHECK-NEXT: [[B_F12:%.*]] = load float*, float** [[B_FLOAT:%.*]], align 8
221+
; CHECK-NEXT: [[B_F:%.*]] = load float*, float** [[B_FLOAT:%.*]], align 8
219222
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
220223
; CHECK: for.body:
221224
; CHECK-NEXT: [[A_ADDR_03:%.*]] = phi float* [ [[INCDEC_PTR:%.*]], [[FOR_BODY]] ], [ [[A]], [[FOR_BODY_PREHEADER]] ]
222-
; CHECK-NEXT: [[B_ADDR_02_PTR:%.*]] = phi float* [ [[ADD:%.*]], [[FOR_BODY]] ], [ [[B_F12]], [[FOR_BODY_PREHEADER]] ]
223-
; CHECK-NEXT: [[TMP1:%.*]] = load float, float* [[B_ADDR_02_PTR]], align 4
225+
; CHECK-NEXT: [[B_ADDR_02_IN:%.*]] = phi float* [ [[ADD:%.*]], [[FOR_BODY]] ], [ [[B_F]], [[FOR_BODY_PREHEADER]] ]
226+
; CHECK-NEXT: [[TMP1:%.*]] = load float, float* [[B_ADDR_02_IN]], align 4
224227
; CHECK-NEXT: [[MUL_I:%.*]] = fmul float [[TMP1]], 4.200000e+01
225228
; CHECK-NEXT: store float [[MUL_I]], float* [[A_ADDR_03]], align 4
226-
; CHECK-NEXT: [[ADD]] = getelementptr inbounds float, float* [[B_ADDR_02_PTR]], i64 1
229+
; CHECK-NEXT: [[ADD]] = getelementptr inbounds float, float* [[B_ADDR_02_IN]], i64 1
227230
; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds float, float* [[A_ADDR_03]], i64 1
228231
; CHECK-NEXT: [[CMP:%.*]] = icmp ult float* [[INCDEC_PTR]], [[A_END]]
229232
; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END]]

‎llvm/test/Transforms/InstCombine/load-bitcast32.ll

Lines changed: 20 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -24,9 +24,10 @@ entry:
2424
define i32* @test2(i8* %x) {
2525
; CHECK-LABEL: @test2(
2626
; CHECK-NEXT: entry:
27-
; CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[X:%.*]] to i32**
28-
; CHECK-NEXT: [[B1:%.*]] = load i32*, i32** [[TMP0]], align 4
29-
; CHECK-NEXT: ret i32* [[B1]]
27+
; CHECK-NEXT: [[A:%.*]] = bitcast i8* [[X:%.*]] to i32*
28+
; CHECK-NEXT: [[B:%.*]] = load i32, i32* [[A]], align 4
29+
; CHECK-NEXT: [[C:%.*]] = inttoptr i32 [[B]] to i32*
30+
; CHECK-NEXT: ret i32* [[C]]
3031
;
3132
entry:
3233
%a = bitcast i8* %x to i32*
@@ -39,9 +40,10 @@ entry:
3940
define i64* @test3(i8* %x) {
4041
; CHECK-LABEL: @test3(
4142
; CHECK-NEXT: entry:
42-
; CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[X:%.*]] to i64**
43-
; CHECK-NEXT: [[B1:%.*]] = load i64*, i64** [[TMP0]], align 4
44-
; CHECK-NEXT: ret i64* [[B1]]
43+
; CHECK-NEXT: [[A:%.*]] = bitcast i8* [[X:%.*]] to i32*
44+
; CHECK-NEXT: [[B:%.*]] = load i32, i32* [[A]], align 4
45+
; CHECK-NEXT: [[C:%.*]] = inttoptr i32 [[B]] to i64*
46+
; CHECK-NEXT: ret i64* [[C]]
4547
;
4648
entry:
4749
%a = bitcast i8* %x to i32*
@@ -54,9 +56,10 @@ entry:
5456
define i64 @test4(i8* %x) {
5557
; CHECK-LABEL: @test4(
5658
; CHECK-NEXT: entry:
57-
; CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[X:%.*]] to i32*
58-
; CHECK-NEXT: [[B1:%.*]] = load i32, i32* [[TMP0]], align 4
59-
; CHECK-NEXT: [[C:%.*]] = zext i32 [[B1]] to i64
59+
; CHECK-NEXT: [[A:%.*]] = bitcast i8* [[X:%.*]] to i64**
60+
; CHECK-NEXT: [[B:%.*]] = load i64*, i64** [[A]], align 4
61+
; CHECK-NEXT: [[TMP0:%.*]] = ptrtoint i64* [[B]] to i32
62+
; CHECK-NEXT: [[C:%.*]] = zext i32 [[TMP0]] to i64
6063
; CHECK-NEXT: ret i64 [[C]]
6164
;
6265
entry:
@@ -70,9 +73,10 @@ entry:
7073
define i32 @test5(i8* %x) {
7174
; CHECK-LABEL: @test5(
7275
; CHECK-NEXT: entry:
73-
; CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[X:%.*]] to i32*
74-
; CHECK-NEXT: [[B1:%.*]] = load i32, i32* [[TMP0]], align 4
75-
; CHECK-NEXT: ret i32 [[B1]]
76+
; CHECK-NEXT: [[A:%.*]] = bitcast i8* [[X:%.*]] to i32**
77+
; CHECK-NEXT: [[B:%.*]] = load i32*, i32** [[A]], align 4
78+
; CHECK-NEXT: [[C:%.*]] = ptrtoint i32* [[B]] to i32
79+
; CHECK-NEXT: ret i32 [[C]]
7680
;
7781
entry:
7882
%a = bitcast i8* %x to i32**
@@ -85,9 +89,10 @@ entry:
8589
define i64 @test6(i8* %x) {
8690
; CHECK-LABEL: @test6(
8791
; CHECK-NEXT: entry:
88-
; CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[X:%.*]] to i32*
89-
; CHECK-NEXT: [[B1:%.*]] = load i32, i32* [[TMP0]], align 4
90-
; CHECK-NEXT: [[C:%.*]] = zext i32 [[B1]] to i64
92+
; CHECK-NEXT: [[A:%.*]] = bitcast i8* [[X:%.*]] to i32**
93+
; CHECK-NEXT: [[B:%.*]] = load i32*, i32** [[A]], align 4
94+
; CHECK-NEXT: [[TMP0:%.*]] = ptrtoint i32* [[B]] to i32
95+
; CHECK-NEXT: [[C:%.*]] = zext i32 [[TMP0]] to i64
9196
; CHECK-NEXT: ret i64 [[C]]
9297
;
9398
entry:

‎llvm/test/Transforms/InstCombine/load-bitcast64.ll

Lines changed: 16 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -7,9 +7,10 @@ target datalayout = "p:64:64:64-i64:32:32"
77
define i64* @test1(i8* %x) {
88
; CHECK-LABEL: @test1(
99
; CHECK-NEXT: entry:
10-
; CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[X:%.*]] to i64**
11-
; CHECK-NEXT: [[B1:%.*]] = load i64*, i64** [[TMP0]], align 4
12-
; CHECK-NEXT: ret i64* [[B1]]
10+
; CHECK-NEXT: [[A:%.*]] = bitcast i8* [[X:%.*]] to i64*
11+
; CHECK-NEXT: [[B:%.*]] = load i64, i64* [[A]], align 4
12+
; CHECK-NEXT: [[C:%.*]] = inttoptr i64 [[B]] to i64*
13+
; CHECK-NEXT: ret i64* [[C]]
1314
;
1415
entry:
1516
%a = bitcast i8* %x to i64*
@@ -56,9 +57,10 @@ entry:
5657
define i64 @test4(i8* %x) {
5758
; CHECK-LABEL: @test4(
5859
; CHECK-NEXT: entry:
59-
; CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[X:%.*]] to i64*
60-
; CHECK-NEXT: [[B1:%.*]] = load i64, i64* [[TMP0]], align 8
61-
; CHECK-NEXT: ret i64 [[B1]]
60+
; CHECK-NEXT: [[A:%.*]] = bitcast i8* [[X:%.*]] to i64**
61+
; CHECK-NEXT: [[B:%.*]] = load i64*, i64** [[A]], align 8
62+
; CHECK-NEXT: [[C:%.*]] = ptrtoint i64* [[B]] to i64
63+
; CHECK-NEXT: ret i64 [[C]]
6264
;
6365
entry:
6466
%a = bitcast i8* %x to i64**
@@ -71,9 +73,10 @@ entry:
7173
define i32 @test5(i8* %x) {
7274
; CHECK-LABEL: @test5(
7375
; CHECK-NEXT: entry:
74-
; CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[X:%.*]] to i64*
75-
; CHECK-NEXT: [[B1:%.*]] = load i64, i64* [[TMP0]], align 8
76-
; CHECK-NEXT: [[C:%.*]] = trunc i64 [[B1]] to i32
76+
; CHECK-NEXT: [[A:%.*]] = bitcast i8* [[X:%.*]] to i32**
77+
; CHECK-NEXT: [[B:%.*]] = load i32*, i32** [[A]], align 8
78+
; CHECK-NEXT: [[TMP0:%.*]] = ptrtoint i32* [[B]] to i64
79+
; CHECK-NEXT: [[C:%.*]] = trunc i64 [[TMP0]] to i32
7780
; CHECK-NEXT: ret i32 [[C]]
7881
;
7982
entry:
@@ -87,9 +90,10 @@ entry:
8790
define i64 @test6(i8* %x) {
8891
; CHECK-LABEL: @test6(
8992
; CHECK-NEXT: entry:
90-
; CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[X:%.*]] to i64*
91-
; CHECK-NEXT: [[B1:%.*]] = load i64, i64* [[TMP0]], align 8
92-
; CHECK-NEXT: ret i64 [[B1]]
93+
; CHECK-NEXT: [[A:%.*]] = bitcast i8* [[X:%.*]] to i32**
94+
; CHECK-NEXT: [[B:%.*]] = load i32*, i32** [[A]], align 8
95+
; CHECK-NEXT: [[C:%.*]] = ptrtoint i32* [[B]] to i64
96+
; CHECK-NEXT: ret i64 [[C]]
9397
;
9498
entry:
9599
%a = bitcast i8* %x to i32**

‎llvm/test/Transforms/InstCombine/memset_chk-1.ll

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -79,10 +79,10 @@ define i32 @test_rauw(i8* %a, i8* %b, i8** %c) {
7979
; CHECK-NEXT: [[CALL50:%.*]] = call i8* @__memmove_chk(i8* [[B]], i8* [[A]], i64 [[ADD180]], i64 [[YO107]])
8080
; CHECK-NEXT: [[STRLEN:%.*]] = call i64 @strlen(i8* nonnull dereferenceable(1) [[B]])
8181
; CHECK-NEXT: [[STRCHR1:%.*]] = getelementptr i8, i8* [[B]], i64 [[STRLEN]]
82-
; CHECK-NEXT: [[TMP0:%.*]] = bitcast i8** [[C:%.*]] to i64*
83-
; CHECK-NEXT: [[D2:%.*]] = load i64, i64* [[TMP0]], align 8
82+
; CHECK-NEXT: [[D:%.*]] = load i8*, i8** [[C:%.*]], align 8
83+
; CHECK-NEXT: [[SUB182:%.*]] = ptrtoint i8* [[D]] to i64
8484
; CHECK-NEXT: [[SUB183:%.*]] = ptrtoint i8* [[B]] to i64
85-
; CHECK-NEXT: [[SUB184:%.*]] = sub i64 [[D2]], [[SUB183]]
85+
; CHECK-NEXT: [[SUB184:%.*]] = sub i64 [[SUB182]], [[SUB183]]
8686
; CHECK-NEXT: [[ADD52_I_I:%.*]] = add nsw i64 [[SUB184]], 1
8787
; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[STRCHR1]], i8 0, i64 [[ADD52_I_I]], i1 false)
8888
; CHECK-NEXT: ret i32 4

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