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kuharkuhar
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[mlir][vector] Simplify rewrite pattern inheriting constructors. NFC. (#161966)
Use the `Base` type alias from #158433.
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6 files changed

+26
-26
lines changed

6 files changed

+26
-26
lines changed

‎mlir/lib/Conversion/VectorToAMX/VectorToAMX.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -363,7 +363,7 @@ static TypedValue<VectorType> storeTile(PatternRewriter &rewriter,
363363
}
364364

365365
struct ContractionToAMX : public OpRewritePattern<vector::ContractionOp> {
366-
using OpRewritePattern::OpRewritePattern;
366+
using Base::Base;
367367

368368
LogicalResult matchAndRewrite(vector::ContractionOp contractOp,
369369
PatternRewriter &rewriter) const override {

‎mlir/lib/Conversion/VectorToArmSME/VectorToArmSME.cpp‎

Lines changed: 13 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -44,7 +44,7 @@ namespace {
4444
/// arm_sme.tile_load ... layout<vertical>
4545
struct TransferReadToArmSMELowering
4646
: public OpRewritePattern<vector::TransferReadOp> {
47-
using OpRewritePattern<vector::TransferReadOp>::OpRewritePattern;
47+
using Base::Base;
4848

4949
LogicalResult matchAndRewrite(vector::TransferReadOp transferReadOp,
5050
PatternRewriter &rewriter) const final {
@@ -120,7 +120,7 @@ struct TransferReadToArmSMELowering
120120
/// : memref<?x?xi8>, vector<[16]x[16]xi8>
121121
struct TransferWriteToArmSMELowering
122122
: public OpRewritePattern<vector::TransferWriteOp> {
123-
using OpRewritePattern<vector::TransferWriteOp>::OpRewritePattern;
123+
using Base::Base;
124124

125125
LogicalResult matchAndRewrite(vector::TransferWriteOp writeOp,
126126
PatternRewriter &rewriter) const final {
@@ -157,7 +157,7 @@ struct TransferWriteToArmSMELowering
157157

158158
/// Conversion pattern for vector.load.
159159
struct VectorLoadToArmSMELowering : public OpRewritePattern<vector::LoadOp> {
160-
using OpRewritePattern<vector::LoadOp>::OpRewritePattern;
160+
using Base::Base;
161161

162162
LogicalResult matchAndRewrite(vector::LoadOp load,
163163
PatternRewriter &rewriter) const override {
@@ -173,7 +173,7 @@ struct VectorLoadToArmSMELowering : public OpRewritePattern<vector::LoadOp> {
173173

174174
/// Conversion pattern for vector.store.
175175
struct VectorStoreToArmSMELowering : public OpRewritePattern<vector::StoreOp> {
176-
using OpRewritePattern<vector::StoreOp>::OpRewritePattern;
176+
using Base::Base;
177177

178178
LogicalResult matchAndRewrite(vector::StoreOp store,
179179
PatternRewriter &rewriter) const override {
@@ -208,7 +208,7 @@ struct VectorStoreToArmSMELowering : public OpRewritePattern<vector::StoreOp> {
208208
/// Supports scalar, 0-d vector, and 1-d vector broadcasts.
209209
struct BroadcastOpToArmSMELowering
210210
: public OpRewritePattern<vector::BroadcastOp> {
211-
using OpRewritePattern<vector::BroadcastOp>::OpRewritePattern;
211+
using Base::Base;
212212

213213
LogicalResult matchAndRewrite(vector::BroadcastOp broadcastOp,
214214
PatternRewriter &rewriter) const final {
@@ -279,7 +279,7 @@ struct BroadcastOpToArmSMELowering
279279
/// implementation, perhaps with tile <-> vector (MOVA) ops.
280280
struct TransposeOpToArmSMELowering
281281
: public OpRewritePattern<vector::TransposeOp> {
282-
using OpRewritePattern<vector::TransposeOp>::OpRewritePattern;
282+
using Base::Base;
283283

284284
LogicalResult matchAndRewrite(vector::TransposeOp transposeOp,
285285
PatternRewriter &rewriter) const final {
@@ -372,7 +372,7 @@ struct TransposeOpToArmSMELowering
372372
struct VectorOuterProductToArmSMELowering
373373
: public OpRewritePattern<vector::OuterProductOp> {
374374

375-
using OpRewritePattern<vector::OuterProductOp>::OpRewritePattern;
375+
using Base::Base;
376376

377377
LogicalResult matchAndRewrite(vector::OuterProductOp outerProductOp,
378378
PatternRewriter &rewriter) const override {
@@ -451,7 +451,7 @@ struct VectorOuterProductToArmSMELowering
451451
/// ```
452452
struct VectorExtractToArmSMELowering
453453
: public OpRewritePattern<vector::ExtractOp> {
454-
using OpRewritePattern<vector::ExtractOp>::OpRewritePattern;
454+
using Base::Base;
455455

456456
LogicalResult matchAndRewrite(vector::ExtractOp extractOp,
457457
PatternRewriter &rewriter) const override {
@@ -507,7 +507,7 @@ struct VectorExtractToArmSMELowering
507507
/// ```
508508
struct VectorInsertToArmSMELowering
509509
: public OpRewritePattern<vector::InsertOp> {
510-
using OpRewritePattern<vector::InsertOp>::OpRewritePattern;
510+
using Base::Base;
511511

512512
LogicalResult matchAndRewrite(vector::InsertOp insertOp,
513513
PatternRewriter &rewriter) const override {
@@ -568,7 +568,7 @@ struct VectorInsertToArmSMELowering
568568
/// }
569569
/// ```
570570
struct VectorPrintToArmSMELowering : public OpRewritePattern<vector::PrintOp> {
571-
using OpRewritePattern<vector::PrintOp>::OpRewritePattern;
571+
using Base::Base;
572572

573573
LogicalResult matchAndRewrite(vector::PrintOp printOp,
574574
PatternRewriter &rewriter) const override {
@@ -623,7 +623,7 @@ struct VectorPrintToArmSMELowering : public OpRewritePattern<vector::PrintOp> {
623623
/// ```
624624
struct FoldTransferWriteOfExtractTileSlice
625625
: public OpRewritePattern<vector::TransferWriteOp> {
626-
using OpRewritePattern<vector::TransferWriteOp>::OpRewritePattern;
626+
using Base::Base;
627627

628628
LogicalResult matchAndRewrite(vector::TransferWriteOp writeOp,
629629
PatternRewriter &rewriter) const final {
@@ -679,7 +679,7 @@ struct FoldTransferWriteOfExtractTileSlice
679679
/// ```
680680
struct ExtractFromCreateMaskToPselLowering
681681
: public OpRewritePattern<vector::ExtractOp> {
682-
using OpRewritePattern<vector::ExtractOp>::OpRewritePattern;
682+
using Base::Base;
683683

684684
LogicalResult matchAndRewrite(vector::ExtractOp extractOp,
685685
PatternRewriter &rewriter) const override {
@@ -734,7 +734,7 @@ struct ExtractFromCreateMaskToPselLowering
734734
// Convert all `vector.splat` to `vector.broadcast`. There is a path from
735735
// `vector.broadcast` to ArmSME via another pattern.
736736
struct ConvertSplatToBroadcast : public OpRewritePattern<vector::SplatOp> {
737-
using OpRewritePattern<vector::SplatOp>::OpRewritePattern;
737+
using Base::Base;
738738

739739
LogicalResult matchAndRewrite(vector::SplatOp splatOp,
740740
PatternRewriter &rewriter) const final {

‎mlir/lib/Conversion/VectorToGPU/VectorToGPU.cpp‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -386,7 +386,7 @@ namespace {
386386
// to MMA matmul.
387387
struct PrepareContractToGPUMMA
388388
: public OpRewritePattern<vector::ContractionOp> {
389-
using OpRewritePattern<vector::ContractionOp>::OpRewritePattern;
389+
using Base::Base;
390390

391391
LogicalResult matchAndRewrite(vector::ContractionOp op,
392392
PatternRewriter &rewriter) const override {
@@ -450,7 +450,7 @@ struct PrepareContractToGPUMMA
450450
// Shared Memory to registers.
451451
struct CombineTransferReadOpTranspose final
452452
: public OpRewritePattern<vector::TransposeOp> {
453-
using OpRewritePattern<vector::TransposeOp>::OpRewritePattern;
453+
using Base::Base;
454454

455455
LogicalResult matchAndRewrite(vector::TransposeOp op,
456456
PatternRewriter &rewriter) const override {

‎mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1342,7 +1342,7 @@ struct VectorScalableExtractOpLowering
13421342
/// ```
13431343
class VectorFMAOpNDRewritePattern : public OpRewritePattern<FMAOp> {
13441344
public:
1345-
using OpRewritePattern<FMAOp>::OpRewritePattern;
1345+
using Base::Base;
13461346

13471347
void initialize() {
13481348
// This pattern recursively unpacks one dimension at a time. The recursion
@@ -2127,7 +2127,7 @@ FailureOr<Value> ContractionOpToMatmulOpLowering::matchAndRewriteMaskableOp(
21272127
class TransposeOpToMatrixTransposeOpLowering
21282128
: public OpRewritePattern<vector::TransposeOp> {
21292129
public:
2130-
using OpRewritePattern<TransposeOp>::OpRewritePattern;
2130+
using Base::Base;
21312131

21322132
LogicalResult matchAndRewrite(vector::TransposeOp op,
21332133
PatternRewriter &rewriter) const override {

‎mlir/lib/Conversion/VectorToSPIRV/VectorToSPIRV.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -838,7 +838,7 @@ struct VectorStoreOpConverter final
838838

839839
struct VectorReductionToIntDotProd final
840840
: OpRewritePattern<vector::ReductionOp> {
841-
using OpRewritePattern::OpRewritePattern;
841+
using Base::Base;
842842

843843
LogicalResult matchAndRewrite(vector::ReductionOp op,
844844
PatternRewriter &rewriter) const override {

‎mlir/lib/Conversion/VectorToXeGPU/VectorToXeGPU.cpp‎

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -475,7 +475,7 @@ static LogicalResult lowerToScatteredStoreOp(vector::TransferWriteOp writeOp,
475475
}
476476

477477
struct TransferReadLowering : public OpRewritePattern<vector::TransferReadOp> {
478-
using OpRewritePattern<vector::TransferReadOp>::OpRewritePattern;
478+
using Base::Base;
479479

480480
LogicalResult matchAndRewrite(vector::TransferReadOp readOp,
481481
PatternRewriter &rewriter) const override {
@@ -546,7 +546,7 @@ struct TransferReadLowering : public OpRewritePattern<vector::TransferReadOp> {
546546

547547
struct TransferWriteLowering
548548
: public OpRewritePattern<vector::TransferWriteOp> {
549-
using OpRewritePattern<vector::TransferWriteOp>::OpRewritePattern;
549+
using Base::Base;
550550

551551
LogicalResult matchAndRewrite(vector::TransferWriteOp writeOp,
552552
PatternRewriter &rewriter) const override {
@@ -597,7 +597,7 @@ struct TransferWriteLowering
597597
};
598598

599599
struct GatherLowering : public OpRewritePattern<vector::GatherOp> {
600-
using OpRewritePattern<vector::GatherOp>::OpRewritePattern;
600+
using Base::Base;
601601

602602
LogicalResult matchAndRewrite(vector::GatherOp gatherOp,
603603
PatternRewriter &rewriter) const override {
@@ -632,7 +632,7 @@ struct GatherLowering : public OpRewritePattern<vector::GatherOp> {
632632
};
633633

634634
struct ScatterLowering : public OpRewritePattern<vector::ScatterOp> {
635-
using OpRewritePattern<vector::ScatterOp>::OpRewritePattern;
635+
using Base::Base;
636636

637637
LogicalResult matchAndRewrite(vector::ScatterOp scatterOp,
638638
PatternRewriter &rewriter) const override {
@@ -662,7 +662,7 @@ struct ScatterLowering : public OpRewritePattern<vector::ScatterOp> {
662662
};
663663

664664
struct LoadLowering : public OpRewritePattern<vector::LoadOp> {
665-
using OpRewritePattern<vector::LoadOp>::OpRewritePattern;
665+
using Base::Base;
666666

667667
LogicalResult matchAndRewrite(vector::LoadOp loadOp,
668668
PatternRewriter &rewriter) const override {
@@ -694,7 +694,7 @@ struct LoadLowering : public OpRewritePattern<vector::LoadOp> {
694694
};
695695

696696
struct StoreLowering : public OpRewritePattern<vector::StoreOp> {
697-
using OpRewritePattern<vector::StoreOp>::OpRewritePattern;
697+
using Base::Base;
698698

699699
LogicalResult matchAndRewrite(vector::StoreOp storeOp,
700700
PatternRewriter &rewriter) const override {
@@ -727,7 +727,7 @@ struct StoreLowering : public OpRewritePattern<vector::StoreOp> {
727727
};
728728

729729
struct ContractionLowering : public OpRewritePattern<vector::ContractionOp> {
730-
using OpRewritePattern<vector::ContractionOp>::OpRewritePattern;
730+
using Base::Base;
731731

732732
LogicalResult matchAndRewrite(vector::ContractionOp contractOp,
733733
PatternRewriter &rewriter) const override {

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