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michaelmaitlandmichaelmaitland
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!fixup drop ir from tests; only call getTypeForLLT once
1 parent ac7697d commit 896fd70

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3 files changed

+26
-54
lines changed

3 files changed

+26
-54
lines changed

‎llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp‎

Lines changed: 6 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -7900,19 +7900,20 @@ LegalizerHelper::LegalizeResult LegalizerHelper::lowerVAArg(MachineInstr &MI) {
79007900
// The list should be bumped by the size of element in the current head of
79017901
// list.
79027902
Register Dst = MI.getOperand(0).getReg();
7903-
LLT Ty = MRI.getType(Dst);
7904-
auto IncAmt = MIRBuilder.buildConstant(
7905-
PtrTyAsScalarTy, DL.getTypeAllocSize(getTypeForLLT(Ty, Ctx)));
7903+
LLT LLTTy = MRI.getType(Dst);
7904+
Type *Ty = getTypeForLLT(LLTTy, Ctx);
7905+
auto IncAmt =
7906+
MIRBuilder.buildConstant(PtrTyAsScalarTy, DL.getTypeAllocSize(Ty));
79067907
auto Succ = MIRBuilder.buildPtrAdd(PtrTy, VAList, IncAmt);
79077908

79087909
// Store the increment VAList to the legalized pointer
79097910
MachineMemOperand *StoreMMO = MF.getMachineMemOperand(
79107911
MachinePointerInfo(), MachineMemOperand::MOStore, PtrTy, PtrAlignment);
79117912
MIRBuilder.buildStore(Succ, ListPtr, *StoreMMO);
79127913
// Load the actual argument out of the pointer VAList
7913-
Align EltAlignment = DL.getABITypeAlign(getTypeForLLT(Ty, Ctx));
7914+
Align EltAlignment = DL.getABITypeAlign(Ty);
79147915
MachineMemOperand *EltLoadMMO = MF.getMachineMemOperand(
7915-
MachinePointerInfo(), MachineMemOperand::MOLoad, Ty, EltAlignment);
7916+
MachinePointerInfo(), MachineMemOperand::MOLoad, LLTTy, EltAlignment);
79167917
MIRBuilder.buildLoad(Dst, VAList, *EltLoadMMO);
79177918

79187919
MI.eraseFromParent();

‎llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-vaarg-rv32.mir‎

Lines changed: 8 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -4,18 +4,6 @@
44
# On RISC-V, the MinStackArgumentAlignment is 1 and the ABI Alignment for p0 is
55
# greater than 1, so we will always generate code to adjust for this alignment.
66

7-
--- |
8-
define void @va_arg_i32(ptr %0, ptr %1, ptr %2, ptr %3, ptr %4, ptr %5, ptr %6, ptr %7, ...) {
9-
%va = alloca ptr, align 4
10-
%p = va_arg ptr %va, i32
11-
ret void
12-
}
13-
define void @va_arg_ptr(ptr %0, ptr %1, ptr %2, ptr %3, ptr %4, ptr %5, ptr %6, ptr %7, ...) {
14-
%va = alloca ptr, align 4
15-
%p = va_arg ptr %va, ptr
16-
ret void
17-
}
18-
...
197
---
208
name: va_arg_i32
219
legalized: false
@@ -24,17 +12,17 @@ fixedStack:
2412
- { id: 0, type: default, offset: 0, size: 4, alignment: 16,
2513
isImmutable: true, isAliased: false }
2614
stack:
27-
- { id: 0, name: va, type: default, offset: 0, size: 4, alignment: 4 }
15+
- { id: 0, type: default, offset: 0, size: 4, alignment: 4 }
2816
machineFunctionInfo:
2917
varArgsFrameIndex: -1
3018
varArgsSaveSize: 0
3119
body: |
32-
bb.1 (%ir-block.8):
20+
bb.1:
3321
liveins: $x10, $x11, $x12, $x13, $x14, $x15, $x16, $x17
3422
; CHECK-LABEL: name: va_arg_i32
3523
; CHECK: liveins: $x10, $x11, $x12, $x13, $x14, $x15, $x16, $x17
3624
; CHECK-NEXT: {{ $}}
37-
; CHECK-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0.va
25+
; CHECK-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0
3826
; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(p0) = G_LOAD [[FRAME_INDEX]](p0) :: (load (p0))
3927
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 3
4028
; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[LOAD]], [[C]](s32)
@@ -44,7 +32,7 @@ body: |
4432
; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[PTRMASK]], [[C2]](s32)
4533
; CHECK-NEXT: G_STORE [[PTR_ADD1]](p0), [[FRAME_INDEX]](p0) :: (store (p0))
4634
; CHECK-NEXT: PseudoRET
47-
%0:_(p0) = G_FRAME_INDEX %stack.0.va
35+
%0:_(p0) = G_FRAME_INDEX %stack.0
4836
%1:_(s32) = G_VAARG %0(p0), 4
4937
PseudoRET
5038
...
@@ -56,17 +44,17 @@ fixedStack:
5644
- { id: 0, type: default, offset: 0, size: 4, alignment: 16,
5745
isImmutable: true, isAliased: false }
5846
stack:
59-
- { id: 0, name: va, type: default, offset: 0, size: 4, alignment: 4 }
47+
- { id: 0, type: default, offset: 0, size: 4, alignment: 4 }
6048
machineFunctionInfo:
6149
varArgsFrameIndex: -1
6250
varArgsSaveSize: 0
6351
body: |
64-
bb.1 (%ir-block.8):
52+
bb.1:
6553
liveins: $x10, $x11, $x12, $x13, $x14, $x15, $x16, $x17
6654
; CHECK-LABEL: name: va_arg_ptr
6755
; CHECK: liveins: $x10, $x11, $x12, $x13, $x14, $x15, $x16, $x17
6856
; CHECK-NEXT: {{ $}}
69-
; CHECK-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0.va
57+
; CHECK-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0
7058
; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(p0) = G_LOAD [[FRAME_INDEX]](p0) :: (load (p0))
7159
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 3
7260
; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[LOAD]], [[C]](s32)
@@ -76,7 +64,7 @@ body: |
7664
; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[PTRMASK]], [[C2]](s32)
7765
; CHECK-NEXT: G_STORE [[PTR_ADD1]](p0), [[FRAME_INDEX]](p0) :: (store (p0))
7866
; CHECK-NEXT: PseudoRET
79-
%0:_(p0) = G_FRAME_INDEX %stack.0.va
67+
%0:_(p0) = G_FRAME_INDEX %stack.0
8068
%1:_(p0) = G_VAARG %0(p0), 4
8169
PseudoRET
8270
...

‎llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-vaarg-rv64.mir‎

Lines changed: 12 additions & 29 deletions
Original file line numberDiff line numberDiff line change
@@ -4,23 +4,6 @@
44
# On RISC-V, the MinStackArgumentAlignment is 1 and the ABI Alignment for p0 is
55
# greater than 1, so we will always generate code to adjust for this alignment.
66

7-
--- |
8-
define void @va_arg_i32(ptr %0, ptr %1, ptr %2, ptr %3, ptr %4, ptr %5, ptr %6, ptr %7, ...) {
9-
%va = alloca ptr, align 8
10-
%p = va_arg ptr %va, i32
11-
ret void
12-
}
13-
define void @va_arg_i64(ptr %0, ptr %1, ptr %2, ptr %3, ptr %4, ptr %5, ptr %6, ptr %7, ...) {
14-
%va = alloca ptr, align 8
15-
%p = va_arg ptr %va, i32
16-
ret void
17-
}
18-
define void @va_arg_ptr(ptr %0, ptr %1, ptr %2, ptr %3, ptr %4, ptr %5, ptr %6, ptr %7, ...) {
19-
%va = alloca ptr, align 8
20-
%p = va_arg ptr %va, ptr
21-
ret void
22-
}
23-
...
247
---
258
name: va_arg_i32
269
legalized: false
@@ -29,14 +12,14 @@ fixedStack:
2912
- { id: 0, type: default, offset: 0, size: 8, alignment: 16,
3013
isImmutable: true, isAliased: false }
3114
stack:
32-
- { id: 0, name: va, type: default, offset: 0, size: 8, alignment: 8 }
15+
- { id: 0, type: default, offset: 0, size: 8, alignment: 8 }
3316
machineFunctionInfo:
3417
varArgsFrameIndex: -1
3518
varArgsSaveSize: 0
3619
body: |
37-
bb.1 (%ir-block.8):
20+
bb.1:
3821
; CHECK-LABEL: name: va_arg_i32
39-
; CHECK: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0.va
22+
; CHECK: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0
4023
; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(p0) = G_LOAD [[FRAME_INDEX]](p0) :: (load (p0))
4124
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 3
4225
; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[LOAD]], [[C]](s64)
@@ -46,7 +29,7 @@ body: |
4629
; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[PTRMASK]], [[C2]](s64)
4730
; CHECK-NEXT: G_STORE [[PTR_ADD1]](p0), [[FRAME_INDEX]](p0) :: (store (p0))
4831
; CHECK-NEXT: PseudoRET
49-
%0:_(p0) = G_FRAME_INDEX %stack.0.va
32+
%0:_(p0) = G_FRAME_INDEX %stack.0
5033
%1:_(s32) = G_VAARG %0(p0), 4
5134
PseudoRET
5235
...
@@ -58,14 +41,14 @@ fixedStack:
5841
- { id: 0, type: default, offset: 0, size: 8, alignment: 16,
5942
isImmutable: true, isAliased: false }
6043
stack:
61-
- { id: 0, name: va, type: default, offset: 0, size: 8, alignment: 8 }
44+
- { id: 0, type: default, offset: 0, size: 8, alignment: 8 }
6245
machineFunctionInfo:
6346
varArgsFrameIndex: -1
6447
varArgsSaveSize: 0
6548
body: |
66-
bb.1 (%ir-block.8):
49+
bb.1:
6750
; CHECK-LABEL: name: va_arg_i64
68-
; CHECK: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0.va
51+
; CHECK: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0
6952
; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(p0) = G_LOAD [[FRAME_INDEX]](p0) :: (load (p0))
7053
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 3
7154
; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[LOAD]], [[C]](s64)
@@ -75,7 +58,7 @@ body: |
7558
; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[PTRMASK]], [[C2]](s64)
7659
; CHECK-NEXT: G_STORE [[PTR_ADD1]](p0), [[FRAME_INDEX]](p0) :: (store (p0))
7760
; CHECK-NEXT: PseudoRET
78-
%0:_(p0) = G_FRAME_INDEX %stack.0.va
61+
%0:_(p0) = G_FRAME_INDEX %stack.0
7962
%1:_(s64) = G_VAARG %0(p0), 4
8063
PseudoRET
8164
...
@@ -87,14 +70,14 @@ fixedStack:
8770
- { id: 0, type: default, offset: 0, size: 8, alignment: 16,
8871
isImmutable: true, isAliased: false }
8972
stack:
90-
- { id: 0, name: va, type: default, offset: 0, size: 8, alignment: 8 }
73+
- { id: 0, type: default, offset: 0, size: 8, alignment: 8 }
9174
machineFunctionInfo:
9275
varArgsFrameIndex: -1
9376
varArgsSaveSize: 0
9477
body: |
95-
bb.1 (%ir-block.8):
78+
bb.1:
9679
; CHECK-LABEL: name: va_arg_ptr
97-
; CHECK: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0.va
80+
; CHECK: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0
9881
; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(p0) = G_LOAD [[FRAME_INDEX]](p0) :: (load (p0))
9982
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 3
10083
; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[LOAD]], [[C]](s64)
@@ -104,7 +87,7 @@ body: |
10487
; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[PTRMASK]], [[C2]](s64)
10588
; CHECK-NEXT: G_STORE [[PTR_ADD1]](p0), [[FRAME_INDEX]](p0) :: (store (p0))
10689
; CHECK-NEXT: PseudoRET
107-
%0:_(p0) = G_FRAME_INDEX %stack.0.va
90+
%0:_(p0) = G_FRAME_INDEX %stack.0
10891
%1:_(s64) = G_VAARG %0(p0), 4
10992
PseudoRET
11093
...

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