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[DA] add flag to control Banerjee MIV test (disabled by default)
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7 files changed

+15
-8
lines changed

7 files changed

+15
-8
lines changed

llvm/lib/Analysis/DependenceAnalysis.cpp

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@@ -117,6 +117,10 @@ static cl::opt<unsigned> MIVMaxLevelThreshold(
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cl::desc("Maximum depth allowed for the recursive algorithm used to "
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"explore MIV direction vectors."));
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static cl::opt<bool> EnableBanerjeeMIVTest(
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"da-enable-banerjee-miv-test", cl::init(false), cl::Hidden,
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cl::desc("Enable Banerjee MIV test in dependence analysis."));
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//===----------------------------------------------------------------------===//
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// basics
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@@ -2590,6 +2594,9 @@ bool DependenceInfo::gcdMIVtest(const SCEV *Src, const SCEV *Dst,
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bool DependenceInfo::banerjeeMIVtest(const SCEV *Src, const SCEV *Dst,
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const SmallBitVector &Loops,
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FullDependence &Result) const {
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if (!EnableBanerjeeMIVTest)
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return false;
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LLVM_DEBUG(dbgs() << "starting Banerjee\n");
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++BanerjeeApplications;
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LLVM_DEBUG(dbgs() << " Src = " << *Src << '\n');

llvm/test/Analysis/DependenceAnalysis/Banerjee.ll

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@@ -1,9 +1,9 @@
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; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py UTC_ARGS: --version 5
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; RUN: opt < %s -disable-output -da-delinearize=false "-passes=print<da>" \
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; RUN: opt < %s -disable-output -da-delinearize=false "-passes=print<da>" -da-enable-banerjee-miv-test \
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; RUN: -aa-pipeline=basic-aa 2>&1 | FileCheck %s
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; RUN: opt < %s -disable-output -da-delinearize=false -passes='print<da><normalized-results>' \
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; RUN: opt < %s -disable-output -da-delinearize=false -passes='print<da><normalized-results>' -da-enable-banerjee-miv-test \
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; RUN: -aa-pipeline=basic-aa 2>&1 | FileCheck %s -check-prefix=NORMALIZE
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; RUN: opt < %s -disable-output "-passes=print<da>" -aa-pipeline=basic-aa 2>&1 \
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; RUN: opt < %s -disable-output "-passes=print<da>" -da-enable-banerjee-miv-test -aa-pipeline=basic-aa 2>&1 \
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; RUN: | FileCheck %s -check-prefix=DELIN
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"

llvm/test/Analysis/DependenceAnalysis/ExactRDIV.ll

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@@ -1,5 +1,5 @@
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; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py UTC_ARGS: --version 5
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; RUN: opt < %s -disable-output "-passes=print<da>" -aa-pipeline=basic-aa 2>&1 \
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; RUN: opt < %s -disable-output "-passes=print<da>" -da-enable-banerjee-miv-test -aa-pipeline=basic-aa 2>&1 \
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; RUN: | FileCheck %s
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; ModuleID = 'ExactRDIV.bc'

llvm/test/Analysis/DependenceAnalysis/GCD.ll

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@@ -1,5 +1,5 @@
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; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py UTC_ARGS: --version 5
2-
; RUN: opt < %s -disable-output "-passes=print<da>" -aa-pipeline=basic-aa 2>&1 \
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; RUN: opt < %s -disable-output "-passes=print<da>" -da-enable-banerjee-miv-test -aa-pipeline=basic-aa 2>&1 \
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; RUN: | FileCheck %s
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"

llvm/test/Analysis/DependenceAnalysis/Propagating.ll

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@@ -1,5 +1,5 @@
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; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py UTC_ARGS: --version 5
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; RUN: opt < %s -disable-output "-passes=print<da>" -aa-pipeline=basic-aa 2>&1 \
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; RUN: opt < %s -disable-output "-passes=print<da>" -da-enable-banerjee-miv-test -aa-pipeline=basic-aa 2>&1 \
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; RUN: | FileCheck %s
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"

llvm/test/Transforms/LoopInterchange/phi-ordering.ll

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@@ -1,5 +1,5 @@
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -passes=loop-interchange -cache-line-size=64 -verify-dom-info -verify-loop-info -verify-scev -verify-loop-lcssa -loop-interchange-threshold=0 -S 2>&1 | FileCheck %s
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; RUN: opt < %s -passes=loop-interchange -cache-line-size=64 -verify-dom-info -verify-loop-info -verify-scev -verify-loop-lcssa -loop-interchange-threshold=0 -da-enable-banerjee-miv-test -S 2>&1 | FileCheck %s
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;; Checks the order of the inner phi nodes does not cause havoc.
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;; The inner loop has a reduction into c. The IV is not the first phi.
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llvm/test/Transforms/LoopInterchange/pr45743-move-from-inner-preheader.ll

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@@ -1,5 +1,5 @@
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -passes=loop-interchange -cache-line-size=64 -S %s | FileCheck %s
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; RUN: opt -passes=loop-interchange -cache-line-size=64 -da-enable-banerjee-miv-test -S %s | FileCheck %s
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@global = external local_unnamed_addr global [400 x [400 x i32]], align 16
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